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Searched refs:DFLAGS (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/clk/rockchip/
H A Dclk-rk3399.c241 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
426 RK3399_CLKSEL_CON(39), 6, 2, MFLAGS, 0, 5, DFLAGS,
445 RK3399_CLKSEL_CON(40), 15, 1, MFLAGS, 0, 10, DFLAGS,
449 RK3399_CLKSEL_CON(41), 15, 1, MFLAGS, 0, 10, DFLAGS,
453 RK3399_CLKSEL_CON(64), 15, 1, MFLAGS, 8, 5, DFLAGS,
457 RK3399_CLKSEL_CON(64), 6, 2, MFLAGS, 0, 5, DFLAGS,
461 RK3399_CLKSEL_CON(65), 15, 1, MFLAGS, 8, 5, DFLAGS,
465 RK3399_CLKSEL_CON(65), 6, 2, MFLAGS, 0, 5, DFLAGS,
479 RK3399_CLKSEL_CON(0), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
482 RK3399_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
[all …]
H A Dclk-rk3576.c277 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
407 RK3576_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS,
410 RK3576_CLKSEL_CON(0), 11, 1, MFLAGS, 6, 5, DFLAGS,
413 RK3576_CLKSEL_CON(1), 5, 1, MFLAGS, 0, 5, DFLAGS,
416 RK3576_CLKSEL_CON(1), 11, 1, MFLAGS, 6, 5, DFLAGS,
419 RK3576_CLKSEL_CON(2), 5, 1, MFLAGS, 0, 5, DFLAGS,
422 RK3576_CLKSEL_CON(2), 11, 1, MFLAGS, 6, 5, DFLAGS,
425 RK3576_CLKSEL_CON(3), 5, 2, MFLAGS, 0, 5, DFLAGS,
428 RK3576_CLKSEL_CON(3), 12, 1, MFLAGS, 7, 5, DFLAGS,
431 RK3576_CLKSEL_CON(4), 11, 1, MFLAGS, 6, 5, DFLAGS,
[all …]
H A Dclk-rk3328.c233 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
270 RK3328_CLKSEL_CON(2), 8, 5, DFLAGS),
272 RK3328_CLKSEL_CON(38), 14, 2, MFLAGS, 0, 14, DFLAGS,
295 RK3328_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
298 RK3328_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
310 RK3328_CLKSEL_CON(44), 6, 2, MFLAGS, 0, 5, DFLAGS,
319 RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
331 RK3328_CLKSEL_CON(4), 13, 2, MFLAGS, 8, 3, DFLAGS,
350 RK3328_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS,
353 RK3328_CLKSEL_CON(1), 8, 2, DFLAGS,
[all …]
H A Dclk-px30.c205 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
283 PX30_CLKSEL_CON(0), 8, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
286 PX30_CLKSEL_CON(0), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
309 PX30_CLKSEL_CON(1), 0, 4, DFLAGS,
312 PX30_CLKSEL_CON(1), 8, 4, DFLAGS,
318 PX30_CLKSEL_CON(1), 13, 2, DFLAGS,
337 PX30_CLKSEL_CON(2), 7, 1, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
339 PX30_CLKSEL_CON(2), 7, 1, MFLAGS, 0, 3, DFLAGS),
364 PX30_CLKSEL_CON(2), 8, 5, DFLAGS,
385 PX30_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 5, DFLAGS,
[all …]
H A Dclk-rk3506.c151 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
184 RK3506_CLKSEL_CON(0), 6, 4, DFLAGS,
187 RK3506_CLKSEL_CON(0), 10, 4, DFLAGS,
190 RK3506_CLKSEL_CON(1), 0, 4, DFLAGS,
193 RK3506_CLKSEL_CON(1), 4, 4, DFLAGS,
196 RK3506_CLKSEL_CON(1), 8, 5, DFLAGS,
199 RK3506_CLKSEL_CON(2), 0, 5, DFLAGS,
202 RK3506_CLKSEL_CON(2), 5, 5, DFLAGS,
246 RK3506_CLKSEL_CON(15), 5, 2, MFLAGS, 0, 5, DFLAGS),
248 RK3506_CLKSEL_CON(15), 9, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
[all …]
H A Dclk-rv1108.c163 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
208 RV1108_CLKSEL_CON(1), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
211 RV1108_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
220 RV1108_CLKSEL_CON(37), 6, 2, MFLAGS, 0, 5, DFLAGS,
225 RV1108_CLKSEL_CON(37), 14, 2, MFLAGS, 8, 5, DFLAGS,
238 RV1108_CLKSEL_CON(36), 6, 2, MFLAGS, 0, 5, DFLAGS,
243 RV1108_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
247 RV1108_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
250 RV1108_CLKSEL_CON(36), 14, 2, MFLAGS, 8, 5, DFLAGS,
269 RV1108_CLKSEL_CON(38), 0, 5, DFLAGS,
[all …]
H A Dclk-rk3588.c521 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
687 RK3588_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS,
690 RK3588_CLKSEL_CON(0), 11, 1, MFLAGS, 6, 5, DFLAGS,
693 RK3588_CLKSEL_CON(1), 5, 1, MFLAGS, 0, 5, DFLAGS,
696 RK3588_CLKSEL_CON(1), 11, 1, MFLAGS, 6, 5, DFLAGS,
699 RK3588_CLKSEL_CON(2), 5, 1, MFLAGS, 0, 5, DFLAGS,
702 RK3588_CLKSEL_CON(2), 11, 1, MFLAGS, 6, 5, DFLAGS,
705 RK3588_CLKSEL_CON(3), 5, 1, MFLAGS, 0, 5, DFLAGS,
708 RK3588_CLKSEL_CON(3), 11, 1, MFLAGS, 6, 5, DFLAGS,
711 RK3588_CLKSEL_CON(4), 5, 1, MFLAGS, 0, 5, DFLAGS,
[all …]
H A Dclk-rk3288.c246 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
293 RK3288_CLKSEL_CON(36), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
296 RK3288_CLKSEL_CON(36), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
299 RK3288_CLKSEL_CON(36), 8, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
302 RK3288_CLKSEL_CON(36), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
305 RK3288_CLKSEL_CON(37), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
308 RK3288_CLKSEL_CON(0), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
311 RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
314 RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
317 RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
[all …]
H A Dclk-rk3368.c152 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
295 RK3368_CLKSEL_CON(0), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
297 RK3368_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
299 RK3368_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
302 RK3368_CLKSEL_CON(2), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
304 RK3368_CLKSEL_CON(3), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
306 RK3368_CLKSEL_CON(3), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
315 RK3368_CLKSEL_CON(4), 6, 2, MFLAGS, 0, 5, DFLAGS),
317 RK3368_CLKSEL_CON(4), 8, 5, DFLAGS,
321 RK3368_CLKSEL_CON(5), 6, 2, MFLAGS, 0, 7, DFLAGS,
[all …]
H A Dclk-rk3228.c180 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
217 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
227 RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
242 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
245 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
264 RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS),
268 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS,
271 RK2928_CLKSEL_CON(1), 12, 3, DFLAGS,
282 RK2928_CLKSEL_CON(32), 5, 2, MFLAGS, 0, 5, DFLAGS,
288 RK2928_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 5, DFLAGS,
[all …]
H A Dclk-rk3128.c170 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
206 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
214 RK2928_CLKSEL_CON(26), 8, 2, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
224 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
227 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
236 RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS,
241 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS,
244 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS,
247 RK2928_CLKSEL_CON(24), 0, 2, DFLAGS,
252 RK2928_CLKSEL_CON(32), 5, 3, MFLAGS, 0, 5, DFLAGS,
[all …]
H A Dclk-rk3308.c195 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
299 RK3308_CLKSEL_CON(0), 8, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
302 RK3308_CLKSEL_CON(0), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
319 RK3308_CLKSEL_CON(6), 8, 5, DFLAGS,
324 RK3308_CLKSEL_CON(6), 0, 5, DFLAGS,
327 RK3308_CLKSEL_CON(5), 0, 5, DFLAGS,
331 RK3308_CLKSEL_CON(10), 13, 3, MFLAGS, 0, 5, DFLAGS,
341 RK3308_CLKSEL_CON(13), 13, 3, MFLAGS, 0, 5, DFLAGS,
351 RK3308_CLKSEL_CON(16), 13, 3, MFLAGS, 0, 5, DFLAGS,
361 RK3308_CLKSEL_CON(19), 13, 3, MFLAGS, 0, 5, DFLAGS,
[all …]
H A Dclk-rv1126b.c176 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
194 RV1126B_CLKSEL_CON(62), 0, 3, DFLAGS),
197 RV1126B_CLKSEL_CON(1), 15, 1, MFLAGS, 5, 5, DFLAGS,
200 RV1126B_CLKSEL_CON(1), 0, 5, DFLAGS,
203 RV1126B_CLKSEL_CON(1), 10, 5, DFLAGS,
206 RV1126B_CLKSEL_CON(2), 0, 5, DFLAGS,
209 RV1126B_CLKSEL_CON(2), 5, 5, DFLAGS,
212 RV1126B_CLKSEL_CON(2), 10, 5, DFLAGS,
215 RV1126B_CLKSEL_CON(3), 0, 5, DFLAGS,
218 RV1126B_CLKSEL_CON(3), 5, 5, DFLAGS,
[all …]
H A Dclk-rv1126.c212 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
273 RV1126_PMU_CLKSEL_CON(1), 0, 5, DFLAGS,
282 RV1126_PMU_CLKSEL_CON(12), 0, 6, DFLAGS,
295 RV1126_PMU_CLKSEL_CON(4), 8, 2, MFLAGS, 0, 7, DFLAGS,
308 RV1126_PMU_CLKSEL_CON(2), 0, 7, DFLAGS,
313 RV1126_PMU_CLKSEL_CON(3), 0, 7, DFLAGS,
321 RV1126_PMU_CLKSEL_CON(6), 7, 1, MFLAGS, 0, 7, DFLAGS,
328 RV1126_PMU_CLKSEL_CON(6), 15, 1, MFLAGS, 8, 7, DFLAGS,
334 RV1126_PMU_CLKSEL_CON(9), 7, 1, MFLAGS, 0, 7, DFLAGS,
351 RV1126_PMU_CLKSEL_CON(7), 8, 7, DFLAGS,
[all …]
H A Dclk-rk3568.c351 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
440 RK3568_CLKSEL_CON(75), 0, 5, DFLAGS,
443 RK3568_CLKSEL_CON(75), 8, 5, DFLAGS,
446 RK3568_CLKSEL_CON(76), 0, 5, DFLAGS,
449 RK3568_CLKSEL_CON(76), 8, 5, DFLAGS,
452 RK3568_CLKSEL_CON(77), 0, 5, DFLAGS,
455 RK3568_CLKSEL_CON(77), 8, 5, DFLAGS,
458 RK3568_CLKSEL_CON(78), 0, 6, DFLAGS,
461 RK3568_CLKSEL_CON(78), 8, 5, DFLAGS,
464 RK3568_CLKSEL_CON(79), 0, 5, DFLAGS,
[all …]
H A Dclk-rk3036.c147 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
189 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
193 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
196 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
202 RK2928_CLKSEL_CON(0), 14, 2, MFLAGS, 8, 5, DFLAGS),
206 RK2928_CLKSEL_CON(1), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
209 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
213 RK2928_CLKSEL_CON(10), 14, 2, MFLAGS, 0, 5, DFLAGS,
219 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
223 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
[all …]
H A Dclk-rk3528.c204 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
264 RK3528_CLKSEL_CON(1), 15, 1, MFLAGS, 10, 5, DFLAGS,
267 RK3528_CLKSEL_CON(3), 11, 1, MFLAGS, 6, 5, DFLAGS,
270 RK3528_CLKSEL_CON(0), 2, 5, DFLAGS,
273 RK3528_CLKSEL_CON(0), 7, 5, DFLAGS,
276 RK3528_CLKSEL_CON(1), 0, 5, DFLAGS,
279 RK3528_CLKSEL_CON(1), 5, 5, DFLAGS,
282 RK3528_CLKSEL_CON(2), 0, 5, DFLAGS,
285 RK3528_CLKSEL_CON(2), 5, 5, DFLAGS,
288 RK3528_CLKSEL_CON(2), 10, 5, DFLAGS,
[all …]