Searched refs:CLK_TOP_APLL_I2SIN3 (Results 1 – 2 of 2) sorted by relevance
82 #define CLK_TOP_APLL_I2SIN3 69 macro
926 MUX_DIV_GATE(CLK_TOP_APLL_I2SIN3, "apll_i2sin3_m", apll_m_parents,