Searched refs:CLK_CPU_HAS_DIV1 (Results 1 – 3 of 3) sorted by relevance
12 #define CLK_CPU_HAS_DIV1 BIT(0) macro
221 if (cpuclk->flags & CLK_CPU_HAS_DIV1) { in exynos_cpuclk_pre_rate_change()264 if (cpuclk->flags & CLK_CPU_HAS_DIV1) { in exynos_cpuclk_pre_rate_change()
1256 CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14000,1262 CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14000,1268 CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14000,