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Searched refs:BIT4 (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/staging/rtl8723bs/include/
H A Dhal_pwr_seq.h
H A Dhal_com_reg.h
H A Drtl8723b_spec.h
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dpwrseq.h99 PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, BIT4 \
161 PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x10, BIT4 \
279 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
375 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0 \
386 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0 \
404 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4|BIT3), 0 \
416 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4) \
475 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3) \
479 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3 \
482 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4 \
[all …]
/linux/drivers/scsi/
H A Ddc395x.h72 #define BIT4 0x00000010 macro
133 #define PARITY_ERROR BIT4
140 #define ENABLE_TIMER BIT4
169 #define WIDE_NEGO_STATE BIT4
596 #define NO_SEEK BIT4
/linux/drivers/video/fbdev/via/
H A Ddvi.c61 viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + in viafb_tmds_trasmitter_identify()
326 viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); in dvi_patch_skew_dvp0()
347 viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4); in dvi_patch_skew_dvp0()
H A Dhw.c947 viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4); in load_fix_bit_crtc_reg()
1713 viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); in set_display_channel()
1717 viafb_write_reg_mask(CRD2, VIACR, 0x10, BIT4 + BIT5); in set_display_channel()
1720 viafb_write_reg_mask(CRD2, VIACR, 0x30, BIT4 + BIT5); in set_display_channel()
1725 viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); in set_display_channel()
1728 viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT4 + BIT5); in set_display_channel()
2061 BIT4); in viafb_set_dpa_gfx()
H A Dshare.h18 #define BIT4 0x10 macro
H A Dviafbdev.c1117 (viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 | in viafb_dvp0_proc_show()
1162 reg_val << 3, BIT4); in viafb_dvp0_proc_write()
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h35 #define BIT4 0x00000010 macro
H A Dhalbtc8821a2ant.h11 #define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT4
H A Dhalbtc8192e2ant.h10 #define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT4
H A Dhalbtc8821a1ant.h11 #define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT4
H A Dhalbtc8723b2ant.h13 #define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT4
H A Dhalbtc8821a1ant.c833 if (byte1 & BIT4 && !(byte1 & BIT5)) { in btc8821a1ant_set_fw_ps_tdma()
836 real_byte1 &= ~BIT4; in btc8821a1ant_set_fw_ps_tdma()
H A Dhalbtc8192e2ant.c2636 u8tmp |= BIT4; in btc8192e2ant_init_hwconfig()
3061 if (!(coex_sta->bt_info_ext & BIT4)) in ex_btc8192e2ant_bt_info_notify()
H A Dhalbtc8723b2ant.c4069 if (!(coex_sta->bt_info_ext & BIT4)) in ex_btc8723b2ant_bt_info_notify()
/linux/drivers/staging/rtl8723bs/hal/
H A DHalBtc8723b2Ant.h
H A DHalBtc8723b1Ant.h
H A DHalBtcOutSrc.h
/linux/include/uapi/linux/
H A Dsynclink.h
/linux/drivers/tty/
H A Dsynclink_gt.c
/linux/lib/zstd/common/
H A Dzstd_internal.h68 #define BIT4 16 macro
/linux/drivers/staging/rtl8723bs/core/
H A Drtw_mlme.c