| /linux/tools/testing/selftests/bpf/prog_tests/ |
| H A D | cgroup_attach_override.c | 8 #define BAR "/foo/bar/" macro 55 bar = test__join_cgroup(BAR); in serial_test_cgroup_attach_override() 66 "attach prog to %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 74 "detach prog from %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 84 "attach prog to %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 98 "attach prog to %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 103 "attach prog to %s unexpectedly succeeded\n", BAR)) in serial_test_cgroup_attach_override() 108 "detach prog from %s failed, errno=%d\n", BAR, errno)) in serial_test_cgroup_attach_override() 123 "attach prog to %s unexpectedly succeeded\n", BAR)) in serial_test_cgroup_attach_override() 129 "attach prog to %s unexpectedly succeeded\n", BAR)) in serial_test_cgroup_attach_override()
|
| /linux/scripts/kconfig/tests/conditional_dep/ |
| H A D | Kconfig | 13 config BAR config 14 bool "BAR symbol" 18 depends on FOO if BAR 23 depends on (FOO && BAR) if (FOO || BAR)
|
| H A D | test_config3 | 1 # If FOO is not selected, but BAR is also not selected, then TEST_BASIC 2 # should pass since the dependency on FOO is conditional on BAR. 3 # TEST_COMPLEX should be also set since neither FOO nor BAR are selected
|
| H A D | test_config2 | 2 # dependency since BAR is set. 3 # TEST_COMPLEX will fail dependency as it depends on both FOO and BAR
|
| /linux/Documentation/arch/powerpc/ |
| H A D | pci_iov_resource_on_powernv.rst | 172 discover the BAR sizes and assign addresses for them. For VF devices, 173 software uses VF BAR registers in the *PF* SR-IOV Capability to 177 When a VF BAR in the PF SR-IOV Capability is programmed, it sets the 180 1MB VF BAR0, the address in that VF BAR sets the base of an 8MB region. 182 is a BAR0 for one of the VFs. Note that even though the VF BAR 195 the segment size matches the smallest VF BAR, which means larger VF 210 and different segment sizes. If we have VFs that each have a 1MB BAR 211 and a 32MB BAR, we could use one M64 window to assign 1MB segments and 215 more in the next two sections. For a given VF BAR, we need to 216 effectively reserve the entire 256 segments (256 * VF BAR size) and [all …]
|
| /linux/Documentation/gpu/rfc/ |
| H A D | i915_small_bar.rst | 2 I915 Small BAR RFC Section 4 Starting from DG2 we will have resizable BAR support for device local-memory(i.e 5 I915_MEMORY_CLASS_DEVICE), but in some cases the final BAR size might still be 14 underneath the device has a small BAR, meaning only some portion of it is CPU 41 1) Error capture is best effort on small BAR systems; if the pages are not
|
| /linux/drivers/ntb/hw/idt/ |
| H A D | Kconfig | 21 accepted by a BAR. Note that BAR0 must map PCI configuration space 25 BAR settings of peer NT-functions, the BAR setups can't be done over
|
| /linux/Documentation/misc-devices/ |
| H A D | pci-endpoint-test.rst | 15 #) verifying addresses programmed in BAR 31 Tests the BAR. The number of the BAR to be tested
|
| /linux/Documentation/kbuild/ |
| H A D | kconfig-language.rst | 128 bool "foo" if BAR 129 default y if BAR 133 depends on BAR 142 depends on BAR if BAZ 144 meaning that FOO is constrained by the value of BAR only if BAZ is 161 if FOO depends on BAR that is not set. 187 depends on BAR 192 FOO BAR BAZ's default choice for BAZ 208 FOO should imply not only BAZ, but also its dependency BAR:: 212 imply BAR [all …]
|
| /linux/Documentation/PCI/endpoint/ |
| H A D | pci-ntb-function.rst | 117 the outbound ATU such that transactions to Doorbell BAR will be routed 128 will configure the outbound ATU such that transactions to MW BAR 155 same BAR. The initial portion of the region will have doorbell 166 same BAR. The initial portion of the region will have config region 177 Used to determine the offset within the DB BAR that should be written 233 If one 32-bit BAR is allocated for each of these regions, the scheme would 237 BAR NO CONSTRUCTS USED 247 However if we allocate a separate BAR for each of the regions, there would not 259 BAR NO CONSTRUCTS USED
|
| H A D | pci-vntb-function.rst | 106 BAR NO CONSTRUCTS USED 119 BAR NO CONSTRUCTS USED
|
| /linux/Documentation/translations/zh_CN/PCI/ |
| H A D | acpi-info.rst | 25 发现它们,使用配置访问来发现和识别设备,并读取和测量它们的BAR。然而,如果ACPI为它们 29 ACPI资源描述是通过ACPI命名空间中设备的_CRS对象完成的[2]。_CRS就像一个通用的PCI BAR:
|
| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-pxa-pci-ce4100.txt | 21 offset from be base of the BAR (which would be 23 the same BAR)
|
| /linux/Documentation/translations/zh_CN/userspace-api/accelerators/ |
| H A D | ocxl.rst | 68 设备被扫描并且BAR(基址寄存器)被分配。像“lspci”的命令因此可以被用于查看
|
| /linux/drivers/pci/endpoint/ |
| H A D | Kconfig | 37 dedicated BAR, which the EP maps to the controller's message address.
|
| /linux/drivers/firmware/broadcom/ |
| H A D | Kconfig | 21 a PCI BAR.
|
| /linux/Documentation/driver-api/pci/ |
| H A D | p2pdma.rst | 86 functionality. For example, if a specific RNIC added a BAR with some 95 A provider simply needs to register a BAR (or a portion of a BAR)
|
| /linux/Documentation/driver-api/ |
| H A D | men-chameleon-bus.rst | 67 header lists the device id, PCI BAR, offset from the beginning of the PCI 68 BAR, size in the FPGA, interrupt number and some other properties currently
|
| H A D | switchtec.rst | 97 NT EP BAR 2 will be dynamically configured as a Direct Window, and
|
| /linux/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/ |
| H A D | switchdev.rst | 79 A subfunction has a dedicated window in PCI BAR space that is not shared 82 PCI BAR space.
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-pci | 486 These files provide an interface to PCIe Resizable BAR support. 487 A file is created for each BAR resource (N) supported by the 488 PCIe Resizable BAR extended capability of the device. Reading 494 The bitmap represents supported resource sizes for the BAR, 496 example the device supports 64MB, 128MB, and 256MB BAR sizes.
|
| /linux/Documentation/gpu/nova/core/ |
| H A D | vbios.rst | 7 images in the ROM of the GPU. The VBIOS is mirrored onto the BAR 0 space and is read
|
| /linux/Documentation/nvme/ |
| H A D | nvme-pci-endpoint-target.rst | 59 The NVMe capabilities exposed to the PCIe host through the BAR 0 registers 113 controller, BAR 0 is allocated with enough space to accommodate the admin queue
|
| /linux/Documentation/arch/arm/ |
| H A D | ixp4xx.rst | 79 To access PCI via this space, we simply ioremap() the BAR
|
| /linux/Documentation/arch/x86/ |
| H A D | earlyprintk.rst | 35 Capabilities: [58] Debug port: BAR=1 offset=00a0
|