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Searched refs:ARRAY_1D_TILED_THIN1 (Results 1 – 25 of 30) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c455 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
483 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
510 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
679 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
719 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
751 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
885 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
913 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
940 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
1109 ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v6_0_tiling_mode_table_init()
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_enum.h526 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Dgmc_8_1_enum.h36 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/linux/sound/soc/amd/include/
H A Dacp_2_2_enum.h510 ARRAY_1D_TILED_THIN1 = 0x2,
526 ARRAY_1D_TILED_THIN1 = 0x2, global() enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_enum.h526 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Dbif_5_0_enum.h36 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_enum.h526 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Dsmu_7_1_0_enum.h79 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Dsmu_7_1_3_enum.h83 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Dsmu_7_1_2_enum.h86 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Dsmu_7_1_1_enum.h86 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/linux/drivers/gpu/drm/radeon/
H A Devergreen_cs.c99 return ARRAY_1D_TILED_THIN1; in evergreen_cs_get_aray_mode()
310 case ARRAY_1D_TILED_THIN1: in evergreen_surface_check()
333 case ARRAY_1D_TILED_THIN1: in evergreen_surface_value_conv_check()
888 surf.mode = ARRAY_1D_TILED_THIN1; in evergreen_cs_track_validate_texture()
895 case ARRAY_1D_TILED_THIN1: in evergreen_cs_track_validate_texture()
H A Dcikd.h1221 # define ARRAY_1D_TILED_THIN1 2 macro
H A Devergreend.h2184 # define ARRAY_1D_TILED_THIN1 2 macro
H A Dr600d.h50 #define ARRAY_1D_TILED_THIN1 0x00000002 macro
H A Dr600_cs.c275 case ARRAY_1D_TILED_THIN1: in r600_get_array_mode_alignment()
/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_enum.h539 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Duvd_5_0_enum.h49 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_enum.h36 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Ddce_10_0_enum.h611 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Ddce_11_0_enum.h5098 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_enum.h221 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Doss_3_0_1_enum.h922 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
H A Doss_3_0_enum.h335 ARRAY_1D_TILED_THIN1 = 0x2, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_enum.h5162 ARRAY_1D_TILED_THIN1 = 0x2, enumerator

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