Searched refs:ARC (Results 1 – 25 of 31) sorted by relevance
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1 Synopsys DesignWare ARC HS Development Kit Device Tree Bindings4 ARC HSDK Board with quad-core ARC HS38x4 in silicon.
1 * ARC Performance Counters8 * The ARC 700 PCT does not support interrupts; although HW events may be
1 Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
3 # ARC EMAC network device configuration7 bool "ARC devices"14 the questions about ARC cards. If you say Y, you will be asked for21 depends on ARC || ARCH_ROCKCHIP || COMPILE_TEST
1 ARC PGU4 by Synopsys. The ARC PGU is an RGB streamer that reads the data from a12 - clock-names: A list of clock names. For ARC PGU it should contain:
1 * ARC PS/2 driver: PS/2 block used in some ARC FPGA's & nSIM OSCI model
6 bool "ARC HS Development Kit SOC"
5 * ARC HS38 Virtual Development Kit (VDK)
5 * ARC HS38 Virtual Development Kit, SMP version (VDK)
5 * ARC AXS101 S/W development platform
45 * to uplink only 1 IRQ to ARC core intc118 * base board's DT node for ARC PGU as for ARc HS38.
53 * to uplink only 1 IRQ to ARC core intc
60 * to uplink only 1 IRQ to ARC core intc
7 * Device Tree for ARC HS Development Kit
11 model = "Anbernic RG ARC-S";
11 model = "Anbernic RG ARC-D";
30 ARC, enumerator
17 tristate "ARC PGU"23 Choose this option if you have an ARC PGU controller.
52 ; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
304 ;############# Return from Intr/Excp/Trap (ARC Specifics) ##############
34 IA-64、DEC VAX、AMD x86-64 Xtensa和ARC架构上。
161 controllers with a viewport register (e.g. Chipidea/ARC controllers).
252 tristate "ARC PS/2 support"255 Say Y here if you have an ARC FPGA platform with a PS/2
1209 TCC010C "Thomas-Conrad TC6045 ARC-Card/AT"1210 TCC030D "Thomas-Conrad TC6042 ARC-Card/CE"1211 TCC040B "Thomas-Conrad TC6142 ARC-Card/CE"1228 TCO010C "Thomas-Conrad TC6045 ARC-Card/AT"1229 TCO030D "Thomas-Conrad TC6042 ARC-Card/CE"1230 TCO040B "Thomas-Conrad TC6142 ARC-Card/CE"