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Searched refs:vlenb (Results 1 – 8 of 8) sorted by relevance

/freebsd/sys/contrib/device-tree/src/riscv/sophgo/
H A Dsg2042-cpus.dtsi265 thead,vlenb = <16>;
292 thead,vlenb = <16>;
319 thead,vlenb = <16>;
346 thead,vlenb = <16>;
373 thead,vlenb = <16>;
400 thead,vlenb = <16>;
427 thead,vlenb = <16>;
454 thead,vlenb = <16>;
481 thead,vlenb = <16>;
508 thead,vlenb = <16>;
[all …]
/freebsd/sys/contrib/device-tree/src/riscv/allwinner/
H A Dsun20i-d1s.dtsi31 thead,vlenb = <128>;
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSystemOperands.td86 def SysRegVLENB: SysReg<"vlenb", 0xC22>;
H A DRISCVScheduleV.td280 // 3.6 Vector Byte Length vlenb
785 // 3.6 Vector Byte Length vlenb
H A DRISCVFeatures.td1785 : SubtargetFeature<"prefer-vsetvli-over-read-vlenb",
1788 "Prefer vsetvli over read vlenb CSR to calculate VLEN">;
H A DRISCVRegisterInfo.td714 def VLENB : RISCVReg<0, "vlenb">,
/freebsd/contrib/llvm-project/libunwind/src/
H A DRegisters.hpp4128 reg_t vlenb; in getRegister() local
4129 __asm__ volatile("csrr %0, 0xC22" : "=r"(vlenb)); in getRegister()
4130 return vlenb; in getRegister()
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Driscv_vector.td411 def vlenb : RVVBuiltin<"", "u", "i">;