| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 242 MI.getOperand(0).setSubReg(KilledProdSubReg); in processBlock()
243 MI.getOperand(1).setSubReg(KilledProdSubReg); in processBlock()
244 MI.getOperand(3).setSubReg(AddSubReg); in processBlock()
258 MI.getOperand(2).setSubReg(AddSubReg); in processBlock()
263 MI.getOperand(2).setSubReg(OtherProdSubReg); in processBlock()
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| H A D | PPCVSXCopy.cpp | 124 SrcMO.setSubReg(PPC::sub_64); in processBlock()
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| H A D | PPCReduceCRLogicals.cpp | 239 FirstTerminator->getOperand(0).setSubReg(BSI.OrigSubreg); in splitMBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMemAbsolute.cpp | 192 MIB->getOperand(0).setSubReg(MO0.getSubReg()); in runOnMachineFunction()
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| H A D | RDFCopy.cpp | 220 Op.setSubReg(0); in run()
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| H A D | HexagonBitSimplify.cpp | 386 I->setSubReg(NewSR); in replaceRegWithSub()
405 I->setSubReg(NewSR); in replaceSubWithSub()
1945 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenCommonISel.cpp | 296 UseMO.setSubReg(Op0->getSubReg()); in salvageDebugInfoForDbgValue()
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| H A D | PeepholeOptimizer.cpp | 218 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
308 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
423 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
926 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY()
1285 NewCopy->getOperand(0).setSubReg(Def.SubReg); in rewriteSource()
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| H A D | TwoAddressInstructionPass.cpp | 1544 SrcMO.setSubReg(0); in collectTiedOperands()
1668 MO.setSubReg(0); in processTiedPairs()
1682 MO.setSubReg(0); in processTiedPairs()
1924 mi->getOperand(0).setSubReg(SubIdx); in run()
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| H A D | RegAllocFast.cpp | 1025 MO.setSubReg(0); in allocVirtRegUndef()
1262 MO.setSubReg(0); in setPhysReg()
1571 MO.setSubReg(0); in allocateInstruction()
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| H A D | MachineSink.cpp | 627 MO->setSubReg(0); in PerformSinkAndFold()
1601 DbgMO.setSubReg(SrcMO->getSubReg()); in attemptDebugCopyProp()
2030 DbgOp.setSubReg(MI.getOperand(1).getSubReg()); in SalvageUnsunkDebugUsersOfCopy()
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| H A D | MachineOperand.cpp | 89 setSubReg(SubIdx); in substVirtReg()
98 setSubReg(0); in substPhysReg()
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| H A D | TargetInstrInfo.cpp | 260 CommutedMI->getOperand(0).setSubReg(SubReg0); in commuteInstructionImpl()
266 CommutedMI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstructionImpl()
267 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| H A D | VirtRegMap.cpp | 734 MO.setSubReg(0); in rewrite()
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| H A D | LiveDebugVariables.cpp | 1413 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
1599 Loc.setSubReg(0); in rewriteLocations()
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| H A D | TailDuplicator.cpp | 456 MO.setSubReg( in duplicateInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreAllocateWWMRegs.cpp | 140 MO.setSubReg(0); in rewriteRegs()
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| H A D | GCNPreRAOptimizations.cpp | 147 I.getOperand(1).setSubReg(DefSrcMO.getSubReg()); in processReg()
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| H A D | SIFoldOperands.cpp | 710 Old.setSubReg(AMDGPU::NoSubRegister); in updateOperand()
1344 UseMI->getOperand(1).setSubReg(SubRegIdx); in foldOperand()
1399 UseMI->getOperand(1).setSubReg(OpToFold.getSubReg()); in foldOperand()
1999 OpToFold.setSubReg(0); in tryFoldFoldableCopy()
2522 MO.setSubReg(AGPRSubReg); in tryFoldPhiAGPR()
2712 MO->setSubReg(AMDGPU::NoSubRegister); in tryOptimizeAGPRPhis()
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| H A D | GCNRewritePartialRegUses.cpp | 424 MO.setSubReg(NewSubReg); in rewriteReg()
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| H A D | GCNSchedStrategy.cpp | 1920 Remat.RematMI->getOperand(0).setSubReg(SubReg); in rematerialize()
2073 NewMI->getOperand(0).setSubReg(SubReg); in finalizeGCNSchedStage()
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| H A D | SIInstrInfo.cpp | 2623 UseMO->setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
2629 MI->getOperand(0).setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
2768 NonRegOp.setSubReg(SubReg); in swapRegAndNonRegOperand()
3601 UseMI.getOperand(0).setSubReg(0); in foldImmediate()
3698 Src0->setSubReg(SrcSubReg); in foldImmediate()
6253 Src0.setSubReg(Src1.getSubReg()); in legalizeOperandsVOP2()
6258 Src1.setSubReg(Src0SubReg); in legalizeOperandsVOP2()
7302 Op.setSubReg(AMDGPU::lo16); in legalizeOperandsVALUt16()
7889 Inst.getOperand(1).setSubReg(AMDGPU::lo16); in moveToVALUImpl()
10418 Op.setSubReg(AMDGPU::sub0); in enforceOperandRCAlignment()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 489 void setSubReg(unsigned subReg) { in setSubReg() function
864 Op.setSubReg(SubReg);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86DomainReassignment.cpp | 515 MO.setSubReg(0); in reassign()
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| H A D | X86InstructionSelector.cpp | |