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Searched refs:preferIncOfAddToSubOfNot (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h778 bool preferIncOfAddToSubOfNot(EVT VT) const override;
H A DARMISelLowering.cpp13962 bool ARMTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const { in preferIncOfAddToSubOfNot() function in ARMTargetLowering
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h413 bool preferIncOfAddToSubOfNot(EVT VT) const override;
H A DAArch64ISelLowering.cpp28513 bool AArch64TargetLowering::preferIncOfAddToSubOfNot(EVT VT) const { in preferIncOfAddToSubOfNot() function in AArch64TargetLowering
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h835 bool preferIncOfAddToSubOfNot(EVT VT) const override;
H A DPPCISelLowering.cpp1644 bool PPCTargetLowering::preferIncOfAddToSubOfNot(EVT VT) const { in preferIncOfAddToSubOfNot() function in PPCTargetLowering
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h935 virtual bool preferIncOfAddToSubOfNot(EVT VT) const { in preferIncOfAddToSubOfNot() function
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp3004 if (!TLI.preferIncOfAddToSubOfNot(VT) && N0.getOpcode() == ISD::ADD && in visitADDLike()
3314 if (!TLI.preferIncOfAddToSubOfNot(VT) && N0.getOpcode() == ISD::ADD && in visitADDLikeCommutative()
4289 if (TLI.preferIncOfAddToSubOfNot(VT) && N1.hasOneUse() && isBitwiseNot(N1)) { in visitSUB()