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Searched refs:getWavefrontSize (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUSubtarget.cpp47 const unsigned WaveSize = getWavefrontSize(); in getMaxLocalMemSizeWithWaveCount()
71 const unsigned WaveSize = getWavefrontSize(), WavesPerEU = getMaxWavesPerEU(); in getOccupancyWithWorkGroupSizes()
153 return std::pair(1, getWavefrontSize()); in getDefaultFlatWorkGroupSize()
403 return getWavefrontSize() == 32 ? AMDGPUDwarfFlavour::Wave32 in getAMDGPUDwarfFlavour()
H A DSILowerI1Copies.h84 ST->getWavefrontSize(); in isLaneMaskReg()
H A DAMDGPUSubtarget.h284 unsigned getWavefrontSize() const { in getWavefrontSize() function
H A DAMDGPUAtomicOptimizer.cpp545 auto *WaveTy = B.getIntNTy(ST.getWavefrontSize()); in buildScanIteratively()
691 Type *const WaveTy = B.getIntNTy(ST.getWavefrontSize()); in optimizeAtomic()
751 Value *const LastLaneIdx = B.getInt32(ST.getWavefrontSize() - 1); in optimizeAtomic()
H A DR600ControlFlowFinalizer.cpp82 if (ST->getWavefrontSize() == 64) { in requiresWorkAroundForInst()
93 assert(ST->getWavefrontSize() == 32); in requiresWorkAroundForInst()
H A DGCNSubtarget.h1642 return getWavefrontSize() == 32; in isWave32()
1646 return getWavefrontSize() == 64; in isWave64()
H A DAMDGPUCallLowering.cpp1249 if (!FallbackExecArg.Ty->isIntegerTy(ST.getWavefrontSize())) { in lowerTailCall()
1284 if (!ExecArg.Ty->isIntegerTy(ST.getWavefrontSize())) { in lowerTailCall()
H A DAMDGPUHSAMetadataStreamer.cpp519 Kern.getDocument()->getNode(STM.getWavefrontSize()); in getHSAKernelProps()
H A DAMDGPUAsmPrinter.cpp379 STM.getMaxWaveScratchSize() / STM.getWavefrontSize(); in validateMCResourceInfo()
1197 CreateExpr(STM.getWavefrontSize()), Ctx), in getSIProgramInfo()
H A DSIMachineFunctionInfo.cpp444 unsigned WaveSize = ST.getWavefrontSize(); in allocateSGPRSpillToVGPRLane()
H A DGCNRegPressure.cpp128 auto WaveSize = ST.getWavefrontSize(); in less()
H A DSIWholeQuadMode.cpp1641 const unsigned WavefrontSize = ST->getWavefrontSize(); in lowerInitExec()
H A DSIRegisterInfo.cpp1726 Offset *= ST.getWavefrontSize(); in buildSpillLoadStore()
3239 Add.addImm(ST.getWavefrontSize()).addReg(FrameReg).addImm(0); in eliminateFrameIndex()
H A DAMDGPUInstCombineIntrinsic.cpp1349 II, ConstantInt::get(II.getType(), ST->getWavefrontSize())); in instCombineIntrinsic()
H A DSIFrameLowering.cpp592 return ST.enableFlatScratch() ? 1 : ST.getWavefrontSize(); in getScratchScaleFactor()
H A DAMDGPUInstructionSelector.cpp1504 if (DstTy.getSizeInBits() != STI.getWavefrontSize()) in selectIntrinsicCmp()
1594 const unsigned WaveSize = STI.getWavefrontSize(); in selectBallot()
1987 if (WGSize <= STI.getWavefrontSize()) { in selectSBarrier()
H A DSIISelLowering.cpp3775 if (!RequestedExecArg.Ty->isIntegerTy(Subtarget->getWavefrontSize())) in LowerCall()
6381 unsigned WavefrontSize = TLI.getSubtarget()->getWavefrontSize(); in lowerICMPIntrinsic()
6411 unsigned WavefrontSize = TLI.getSubtarget()->getWavefrontSize(); in lowerFCMPIntrinsic()
9130 return DAG.getConstant(MF.getSubtarget<GCNSubtarget>().getWavefrontSize(), in LowerINTRINSIC_WO_CHAIN()
10167 if (WGSize <= ST.getWavefrontSize()) { in LowerINTRINSIC_VOID()
17627 return hasCFUser(V, Visited, Subtarget->getWavefrontSize()); in requiresUniformRegister()
H A DAMDGPUISelDAGToDAG.cpp2570 VCMP.getValueType().getSizeInBits() == Subtarget->getWavefrontSize()) { in SelectBRCOND()
H A DAMDGPULegalizerInfo.cpp7513 B.buildConstant(MI.getOperand(0), ST.getWavefrontSize()); in legalizeIntrinsic()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h217 unsigned getWavefrontSize(const MCSubtargetInfo *STI);
H A DAMDGPUBaseInfo.cpp1099 unsigned getWavefrontSize(const MCSubtargetInfo *STI) { in getWavefrontSize() function
1186 return divideCeil(FlatWorkGroupSize, getWavefrontSize(STI)); in getWavesPerWorkGroup()