| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DirectXTargetTransformInfo.h | 36 unsigned getMinVectorRegisterBitWidth() const override { return 32; } in getMinVectorRegisterBitWidth() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600TargetTransformInfo.h | 53 unsigned getMinVectorRegisterBitWidth() const override;
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| H A D | R600TargetTransformInfo.cpp | 45 unsigned R600TTIImpl::getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function in R600TTIImpl
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| H A D | AMDGPUTargetTransformInfo.h | 124 unsigned getMinVectorRegisterBitWidth() const override;
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| H A D | AMDGPUTargetTransformInfo.cpp | 343 unsigned GCNTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in GCNTTIImpl
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VETargetTransformInfo.h | 121 unsigned getMinVectorRegisterBitWidth() const override { in getMinVectorRegisterBitWidth() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 124 return TypeSize::getFixed(getMinVectorRegisterBitWidth()); in getRegisterBitWidth()
132 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in HexagonTTIImpl
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| H A D | HexagonTargetTransformInfo.h | 89 unsigned getMinVectorRegisterBitWidth() const override;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXTargetTransformInfo.h | 88 unsigned getMinVectorRegisterBitWidth() const override { return 32; } in getMinVectorRegisterBitWidth() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.h | 149 unsigned getMinVectorRegisterBitWidth() const override { in getMinVectorRegisterBitWidth() function
150 return ST->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
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| H A D | AArch64Subtarget.h | 215 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.h | 158 unsigned getMinVectorRegisterBitWidth() const override { in getMinVectorRegisterBitWidth() function
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 786 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in TargetTransformInfo
787 return TTIImpl->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 1214 LLVM_ABI unsigned getMinVectorRegisterBitWidth() const;
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| H A D | TargetTransformInfoImpl.h | 588 virtual unsigned getMinVectorRegisterBitWidth() const { return 128; } in getMinVectorRegisterBitWidth() function
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 192 unsigned MinVectorSize = TTI.getMinVectorRegisterBitWidth(); in canWidenLoad()
220 unsigned MinVectorSize = TTI.getMinVectorRegisterBitWidth(); in vectorizeLoadInsert()
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| H A D | SLPVectorizer.cpp | 1815 MinVecRegSize = TTI->getMinVectorRegisterBitWidth(); in BoUpSLP()
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