| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 37 unsigned FirstUnallocGPR = State.getFirstUnallocated(ELF64ArgGPRs); in CC_PPC64_ELF_Shadow_GPR_Regs()
77 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs()
102 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
128 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
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| H A D | PPCISelLowering.cpp | 4433 FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs)); in LowerFormalArguments_32SVR4()
4434 FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs)); in LowerFormalArguments_32SVR4()
6904 unsigned NextReg = State.getFirstUnallocated(GPRs); in CC_AIX()
6913 NextReg = State.getFirstUnallocated(GPRs); in CC_AIX()
7019 unsigned NextRegIndex = State.getFirstUnallocated(GPRs); in CC_AIX()
7029 NextRegIndex = State.getFirstUnallocated(GPRs); in CC_AIX()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 317 unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const { in getFirstUnallocated() function
352 unsigned FirstUnalloc = getFirstUnallocated(Regs); in AllocateReg()
394 unsigned FirstUnalloc = getFirstUnallocated(Regs); in AllocateReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.cpp | 201 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
247 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
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| H A D | ARMISelLowering.cpp | 4481 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs()
4612 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 277 unsigned FirstFree = State.getFirstUnallocated(RegList); in CC_X86_32_MCUInReg()
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| H A D | X86CallLowering.cpp | |
| H A D | X86ISelLoweringCall.cpp | 1552 unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs); in createVarArgAreaAndStoreRegisters()
1553 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(ArgXMMs); in createVarArgAreaAndStoreRegisters()
2343 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs); in LowerCall()
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| H A D | X86FastISel.cpp | 3537 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs); in fastLowerCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 79 NumXMMRegs = State.getFirstUnallocated(XMMArgRegs); in assignArg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVCallingConv.cpp | 471 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV()
718 State.getFirstUnallocated(ArgGPRs) != ArgGPRs.size()) { in CC_RISCV_FastCC()
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| H A D | RISCVISelLowering.cpp | 22364 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 616 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters()
656 unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs); in saveVarArgRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 408 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in lowerFormalArguments()
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| H A D | MipsISelLowering.cpp | 3089 State.getFirstUnallocated(F32Regs) != ValNo; in CC_MipsO32()
4691 unsigned Idx = State.getFirstUnallocated(ArgRegs); in writeVarArgRegs()
4757 FirstReg = State->getFirstUnallocated(IntArgRegs); in HandleByVal()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 473 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in saveVarArgRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 545 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs); in LowerCallArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 372 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 514 unsigned Idx = CCInfo.getFirstUnallocated(IntRegs); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1226 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs); in LowerCCCArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 6736 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_LoongArch()
6750 if (State.getFirstUnallocated(ArgFPR32s) == std::size(ArgFPR32s)) in CC_LoongArch()
7154 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 591 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments_32()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 146 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_SkipOdd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 2400 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgVGPRs); in allocateVGPR32Input()
2422 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgSGPRs); in allocateSGPR32InputImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8234 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters()
8280 unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs); in saveVarArgRegisters()
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