| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 369 EVT VecVT = N->getValueType(0); in ExpandOp_BUILD_VECTOR() local 370 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_BUILD_VECTOR() 375 assert(OldVT == VecVT.getVectorElementType() && in ExpandOp_BUILD_VECTOR() 378 if (VecVT.isInteger() && TLI.isOperationLegal(ISD::SPLAT_VECTOR, VecVT) && in ExpandOp_BUILD_VECTOR() 379 TLI.isOperationLegalOrCustom(ISD::SPLAT_VECTOR_PARTS, VecVT)) { in ExpandOp_BUILD_VECTOR() 383 return DAG.getNode(ISD::SPLAT_VECTOR_PARTS, dl, VecVT, Lo, Hi); in ExpandOp_BUILD_VECTOR() 405 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_BUILD_VECTOR() 427 EVT VecVT = N->getValueType(0); in ExpandOp_INSERT_VECTOR_ELT() local 428 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_INSERT_VECTOR_ELT() 435 assert(OldEVT == VecVT.getVectorElementType() && in ExpandOp_INSERT_VECTOR_ELT() [all …]
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| H A D | LegalizeVectorTypes.cpp | 1669 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_SUBVECTOR() local 1672 unsigned VecElems = VecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR() 1687 if (VecVT.isScalableVector() == SubVecVT.isScalableVector() && in SplitVecRes_INSERT_SUBVECTOR() 1697 if (WideSubVec.getValueType() == VecVT) { in SplitVecRes_INSERT_SUBVECTOR() 1706 Align SmallestAlign = DAG.getReducedAlign(VecVT, /*UseABI=*/false); in SplitVecRes_INSERT_SUBVECTOR() 1708 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_SUBVECTOR() 1718 TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, SubVecVT, Idx); in SplitVecRes_INSERT_SUBVECTOR() 1934 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, ResNE); in UnrollVectorOp_StrictFP() local 1935 return DAG.getBuildVector(VecVT, dl, Scalars); in UnrollVectorOp_StrictFP() 2003 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_VECTOR_ELT() local [all …]
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| H A D | LegalizeDAG.cpp | 1454 EVT VecVT = Vec.getValueType(); in ExpandExtractFromVectorThroughStack() local 1458 StackPtr = DAG.CreateStackTemporary(VecVT); in ExpandExtractFromVectorThroughStack() 1460 StackPtr, DAG.getMachineFunction(), VecVT.isScalableVector()); in ExpandExtractFromVectorThroughStack() 1471 StackPtr = TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, in ExpandExtractFromVectorThroughStack() 1476 StackPtr = TLI.getVectorElementPointer(DAG, StackPtr, VecVT, Idx); in ExpandExtractFromVectorThroughStack() 1478 MachinePointerInfo(), VecVT.getVectorElementType(), in ExpandExtractFromVectorThroughStack() 1503 EVT VecVT = Vec.getValueType(); in ExpandInsertToVectorThroughStack() local 1505 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in ExpandInsertToVectorThroughStack() 1525 TLI.getVectorSubVecPointer(DAG, StackPtr, VecVT, PartVT, Idx); in ExpandInsertToVectorThroughStack() 1534 TLI.getVectorElementPointer(DAG, StackPtr, VecVT, Idx); in ExpandInsertToVectorThroughStack() [all …]
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| H A D | LegalizeVectorOps.cpp | 627 MVT VecVT = Node->getOperand(0).getSimpleValueType(); in PromoteSETCC() local 628 MVT NewVecVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VecVT); in PromoteSETCC() 630 unsigned ExtOp = VecVT.isFloatingPoint() ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in PromoteSETCC() 652 MVT VecVT = Node->getOperand(1).getSimpleValueType(); in PromoteSTRICT() local 653 MVT NewVecVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VecVT); in PromoteSTRICT() 655 assert(VecVT.isFloatingPoint()); in PromoteSTRICT() 683 DAG.getNode(ISD::STRICT_FP_ROUND, DL, {VecVT, MVT::Other}, in PromoteSTRICT()
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| H A D | TargetLowering.cpp | 926 EVT VecVT = Vec.getValueType(); in SimplifyMultipleUseDemandedBits() local 927 if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements()) && in SimplifyMultipleUseDemandedBits() 1276 EVT VecVT = Vec.getValueType(); in SimplifyDemandedBits() local 1281 if (CIdx && CIdx->getAPIntValue().ult(VecVT.getVectorNumElements())) { in SimplifyDemandedBits() 10597 EVT VecVT, const SDLoc &dl, in clampDynamicVectorIndex() argument 10599 assert(!(SubEC.isScalable() && VecVT.isFixedLengthVector()) && in clampDynamicVectorIndex() 10602 unsigned NElts = VecVT.getVectorMinNumElements(); in clampDynamicVectorIndex() 10606 if (VecVT.isScalableVector() && !SubEC.isScalable()) { in clampDynamicVectorIndex() 10631 SDValue VecPtr, EVT VecVT, in getVectorElementPointer() argument 10634 DAG, VecPtr, VecVT, in getVectorElementPointer() [all …]
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| H A D | SelectionDAG.cpp | 4232 EVT VecVT = InVec.getValueType(); in computeKnownBits() local 4234 if (VecVT.isScalableVector()) in computeKnownBits() 4236 const unsigned EltBitWidth = VecVT.getScalarSizeInBits(); in computeKnownBits() 4237 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in computeKnownBits() 5175 EVT VecVT = InVec.getValueType(); in ComputeNumSignBits() local 5177 if (VecVT.isScalableVector()) in ComputeNumSignBits() 5181 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in ComputeNumSignBits() 5652 EVT VecVT = Op.getOperand(0).getValueType(); in canCreateUndefOrPoison() local 5655 return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements()); in canCreateUndefOrPoison() 8103 [[maybe_unused]] EVT VecVT = N1.getValueType(); in getNode() local [all …]
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| H A D | DAGCombiner.cpp | 12677 EVT VecVT = Vec.getValueType(); in visitVECTOR_COMPRESS() local 12691 EVT ScalarVT = VecVT.getVectorElementType(); in visitVECTOR_COMPRESS() 12693 unsigned NumElmts = VecVT.getVectorNumElements(); in visitVECTOR_COMPRESS() 12715 return DAG.getBuildVector(VecVT, DL, Ops); in visitVECTOR_COMPRESS() 23441 EVT VecVT = VecOp.getValueType(); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() local 23442 assert(!VecVT.isScalableVector() && "Only for fixed vectors."); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() 23449 assert(IndexC->getZExtValue() < VecVT.getVectorNumElements() && in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() 23453 unsigned VecEltBitWidth = VecVT.getScalarSizeInBits(); in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() 23455 if (VecVT.getScalarType() != ScalarVT) in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() 23489 if (!(E.NumBits > 0 && E.BitPos < VecVT.getSizeInBits() && in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2257 EVT VecVT = VecOp.getValueType(); in shouldScalarizeBinop() local 2258 if (!isOperationLegalOrCustomOrPromote(Opc, VecVT)) in shouldScalarizeBinop() 2265 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop() 2653 MVT VecVT, MVT SubVecVT, unsigned InsertExtractIdx, in decomposeSubvectorInsertExtractToSubRegs() argument 2659 unsigned VecRegClassID = getRegClassIDForVecVT(VecVT); in decomposeSubvectorInsertExtractToSubRegs() 2664 if (VecVT.isRISCVVectorTuple()) { in decomposeSubvectorInsertExtractToSubRegs() 2670 assert(getLMUL(VecVT) == getLMUL(SubVecVT) && in decomposeSubvectorInsertExtractToSubRegs() 2673 return {getSubregIndexByMVT(VecVT, InsertExtractIdx), 0}; in decomposeSubvectorInsertExtractToSubRegs() 2686 VecVT = VecVT.getHalfNumVectorElementsVT(); in decomposeSubvectorInsertExtractToSubRegs() 2688 InsertExtractIdx >= VecVT.getVectorElementCount().getKnownMinValue(); in decomposeSubvectorInsertExtractToSubRegs() [all …]
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| H A D | RISCVISelLowering.h | 348 SDValue computeVLMax(MVT VecVT, const SDLoc &DL, SelectionDAG &DAG) const; 379 decomposeSubvectorInsertExtractToSubRegs(MVT VecVT, MVT SubVecVT,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4356 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC, in getVCmpInst() argument 4361 if (VecVT.isFloatingPoint()) { in getVCmpInst() 4384 if (VecVT == MVT::v4f32) in getVCmpInst() 4386 else if (VecVT == MVT::v2f64) in getVCmpInst() 4391 if (VecVT == MVT::v4f32) in getVCmpInst() 4393 else if (VecVT == MVT::v2f64) in getVCmpInst() 4398 if (VecVT == MVT::v4f32) in getVCmpInst() 4400 else if (VecVT == MVT::v2f64) in getVCmpInst() 4428 if (VecVT == MVT::v16i8) in getVCmpInst() 4430 else if (VecVT == MVT::v8i16) in getVCmpInst() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 891 VecVT = MVT::getVectorVT(MVT::getIntegerVT(8), 16); in isVectorConstantLegal() 904 VecVT = MVT::getVectorVT(MVT::getIntegerVT(SplatBitSize), in isVectorConstantLegal() 917 VecVT = MVT::getVectorVT(MVT::getIntegerVT(SplatBitSize), in isVectorConstantLegal() 6548 EVT VecVT = Op0.getValueType(); in lowerEXTRACT_VECTOR_ELT() local 6553 unsigned Mask = VecVT.getVectorNumElements() - 1; in lowerEXTRACT_VECTOR_ELT() 6560 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT() 7538 EVT VecVT, SDValue Op, in combineExtract() argument 7545 unsigned BytesPerElement = VecVT.getVectorElementType().getStoreSize(); in combineExtract() 7631 if (Op.getValueType() != VecVT) { in combineExtract() 7632 Op = DAG.getNode(ISD::BITCAST, DL, VecVT, Op); in combineExtract() [all …]
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| H A D | SystemZISelLowering.h | 764 SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp, 870 MVT VecVT; member
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| H A D | SystemZISelDAGToDAG.cpp | 1193 assert(VCI.VecVT.getSizeInBits() == 128 && "Expected a vector type"); in loadVectorConstant() 1199 SDValue Op = CurDAG->getNode(VCI.Opcode, DL, VCI.VecVT, Ops); in loadVectorConstant() 1201 if (VCI.VecVT == VT.getSimpleVT()) in loadVectorConstant()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6925 EVT VecVT = Vec.getValueType(); in LowerVECTOR_COMPRESS() local 6927 EVT ElmtVT = VecVT.getVectorElementType(); in LowerVECTOR_COMPRESS() 6928 const bool IsFixedLength = VecVT.isFixedLengthVector(); in LowerVECTOR_COMPRESS() 6930 unsigned MinElmts = VecVT.getVectorElementCount().getKnownMinValue(); in LowerVECTOR_COMPRESS() 6933 assert(VecVT.isVector() && "Input to VECTOR_COMPRESS must be vector."); in LowerVECTOR_COMPRESS() 6938 if (IsFixedLength && VecVT.getSizeInBits().getFixedValue() > 128) in LowerVECTOR_COMPRESS() 6964 VecVT = Vec.getValueType(); in LowerVECTOR_COMPRESS() 6969 EVT ContainerVT = getSVEContainerType(VecVT); in LowerVECTOR_COMPRESS() 6970 EVT CastVT = VecVT.changeVectorElementTypeToInteger(); in LowerVECTOR_COMPRESS() 6974 if (ContainerVT != VecVT) { in LowerVECTOR_COMPRESS() [all …]
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| H A D | AArch64TargetTransformInfo.cpp | 545 static bool isUnpackedVectorVT(EVT VecVT) { in isUnpackedVectorVT() argument 546 return VecVT.isScalableVector() && in isUnpackedVectorVT() 547 VecVT.getSizeInBits().getKnownMinValue() < AArch64::SVEBitsPerBlock; in isUnpackedVectorVT() 673 EVT VecVT = getTLI()->getValueType(DL, ICA.getArgTypes()[0]); in getIntrinsicInstrCost() local 679 if (isUnpackedVectorVT(VecVT) || isUnpackedVectorVT(SubVecVT)) in getIntrinsicInstrCost() 685 getTLI()->getTypeConversion(C, VecVT); in getIntrinsicInstrCost() 5300 EVT VecVT = TLI->getValueType(DL, VecTy); in getExtendedReductionCost() local 5303 if (Opcode == Instruction::Add && VecVT.isSimple() && ResVT.isSimple() && in getExtendedReductionCost() 5304 VecVT.getSizeInBits() >= 64) { in getExtendedReductionCost() 5328 EVT VecVT = TLI->getValueType(DL, VecTy); in getMulAccReductionCost() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3394 EVT VecVT = VecOp.getValueType(); in shouldScalarizeBinop() local 3395 if (!isOperationLegalOrCustomOrPromote(Opc, VecVT)) in shouldScalarizeBinop() 3400 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop() 4196 EVT VecVT = Vec.getValueType(); in widenSubVector() local 4197 assert(VecVT.getFixedSizeInBits() <= VT.getFixedSizeInBits() && in widenSubVector() 4198 VecVT.getScalarType() == VT.getScalarType() && in widenSubVector() 4202 if (Vec.getOpcode() == ISD::BUILD_VECTOR && VecVT.is256BitVector()) { in widenSubVector() 4203 unsigned NumSrcElts = VecVT.getVectorNumElements(); in widenSubVector() 7438 MVT VecVT = MVT::getVectorVT(VecSVT, VT.getSizeInBits() / LoadSizeInBits); in EltsFromConsecutiveLoads() local 7442 VecVT = MVT::v4f32; in EltsFromConsecutiveLoads() [all …]
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| H A D | X86ISelLoweringCall.cpp | 1648 MVT VecVT = MVT::Other; in forwardMustTailParameters() local 1653 VecVT = MVT::v16f32; in forwardMustTailParameters() 1655 VecVT = MVT::v8f32; in forwardMustTailParameters() 1657 VecVT = MVT::v4f32; in forwardMustTailParameters() 1663 if (VecVT != MVT::Other) in forwardMustTailParameters() 1664 RegParmTypes.push_back(VecVT); in forwardMustTailParameters()
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| H A D | X86ISelDAGToDAG.cpp | 469 MVT VecVT = N->getOperand(0).getSimpleValueType(); in getExtractVEXTRACTImmediate() local 470 return getI8Imm((Index * VecVT.getScalarSizeInBits()) / VecWidth, DL); in getExtractVEXTRACTImmediate() 477 MVT VecVT = N->getSimpleValueType(0); in getInsertVINSERTImmediate() local 478 return getI8Imm((Index * VecVT.getScalarSizeInBits()) / VecWidth, DL); in getInsertVINSERTImmediate() 485 MVT VecVT = N->getSimpleValueType(0); in getPermuteVINSERTCommutedImmediate() local 486 uint64_t InsertIdx = (Index * VecVT.getScalarSizeInBits()) / VecWidth; in getPermuteVINSERTCommutedImmediate() 1310 MVT VecVT = VT == MVT::f64 ? MVT::v2f64 in PreprocessISelDAG() local 1315 SDValue Op0 = CurDAG->getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, in PreprocessISelDAG() 1317 SDValue Op1 = CurDAG->getNode(ISD::SCALAR_TO_VECTOR, dl, VecVT, in PreprocessISelDAG() 1322 EVT IntVT = EVT(VecVT).changeVectorElementTypeToInteger(); in PreprocessISelDAG() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 469 EVT VecVT = VecOp.getValueType(); in shouldScalarizeBinop() local 470 if (!isOperationLegalOrCustomOrPromote(Opc, VecVT)) in shouldScalarizeBinop() 475 EVT ScalarVT = VecVT.getScalarType(); in shouldScalarizeBinop() 3341 static SDValue TryMatchTrue(SDNode *N, EVT VecVT, SelectionDAG &DAG) { in TryMatchTrue() argument 3355 DAG.getSExtOrTrunc(LHS->getOperand(0), DL, VecVT)}), in TryMatchTrue() 3386 EVT VecVT = FromVT.changeVectorElementType(MVT::getIntegerVT(128 / NumElts)); in performSETCCCombine() local 3391 N, VecVT, DAG)) { in performSETCCCombine() 3397 N, VecVT, DAG)) { in performSETCCCombine() 3403 N, VecVT, DAG)) { in performSETCCCombine() 3409 N, VecVT, DAG)) { in performSETCCCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.h | 255 bool aggressivelyPreferBuildVectorSources(EVT VecVT) const override { in aggressivelyPreferBuildVectorSources() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6591 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NE); in lowerLaneOp() local 6592 return DAG.getBuildVector(VecVT, SL, Scalars); in lowerLaneOp() 6640 MVT VecVT = in lowerLaneOp() local 6642 Src0 = DAG.getBitcast(VecVT, Src0); in lowerLaneOp() 6645 Src1 = DAG.getBitcast(VecVT, Src1); in lowerLaneOp() 6648 Src2 = DAG.getBitcast(VecVT, Src2); in lowerLaneOp() 6650 SDValue LaneOp = createLaneOp(Src0, Src1, Src2, VecVT); in lowerLaneOp() 7693 EVT VecVT = Vec.getValueType(); in lowerINSERT_SUBVECTOR() local 7695 EVT EltVT = VecVT.getVectorElementType(); in lowerINSERT_SUBVECTOR() 7704 unsigned VecNumElts = VecVT.getVectorNumElements(); in lowerINSERT_SUBVECTOR() [all …]
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| H A D | R600ISelLowering.cpp | 628 EVT VecVT = Vector.getValueType(); in vectorToVerticalVector() local 629 EVT EltVT = VecVT.getVectorElementType(); in vectorToVerticalVector() 632 for (unsigned i = 0, e = VecVT.getVectorNumElements(); i != e; ++i) { in vectorToVerticalVector() 637 return DAG.getNode(AMDGPUISD::BUILD_VERTICAL_VECTOR, DL, VecVT, Args); in vectorToVerticalVector()
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| H A D | AMDGPUISelLowering.h | 230 bool aggressivelyPreferBuildVectorSources(EVT VecVT) const override;
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| H A D | AMDGPULowerBufferFatPointers.cpp | 909 auto *VecVT = dyn_cast<FixedVectorType>(Vec->getType()); in extractSlice() local 910 if (!VecVT) in extractSlice() 912 if (S.Length == VecVT->getNumElements() && S.Index == 0) in extractSlice()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6302 EVT VecVT = EVT::getVectorVT( in CombineVMOVDRRCandidateWithVecOp() local 6305 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp() 8150 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR() local 8151 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR() 8207 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerBUILD_VECTOR() local 8211 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR() 9061 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerVECTOR_SHUFFLE() local 9062 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE() 9063 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE() 9074 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE() [all …]
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