9978   EVT VecVT;  in LowerFCOPYSIGN()  local
9982           DAG.getTargetInsertSubreg(Idx, DL, VecVT, DAG.getUNDEF(VecVT), In1);  in LowerFCOPYSIGN()
9984           DAG.getTargetInsertSubreg(Idx, DL, VecVT, DAG.getUNDEF(VecVT), In2);  in LowerFCOPYSIGN()
9986       VecVal1 = BitCast(VecVT, In1, DAG);  in LowerFCOPYSIGN()
9987       VecVal2 = BitCast(VecVT, In2, DAG);  in LowerFCOPYSIGN()
9991     VecVT = IntVT;  in LowerFCOPYSIGN()
9994     VecVT = MVT::v2i64;  in LowerFCOPYSIGN()
9997     VecVT = MVT::v4i32;  in LowerFCOPYSIGN()
10000     VecVT = MVT::v8i16;  in LowerFCOPYSIGN()
10007   SDValue SignMaskV = DAG.getConstant(~APInt::getSignMask(BitWidth), DL, VecVT);  in LowerFCOPYSIGN()
10013     SignMaskV = DAG.getConstant(APInt::getAllOnes(BitWidth), DL, VecVT);  in LowerFCOPYSIGN()
10020       DAG.getNode(AArch64ISD::BSP, DL, VecVT, SignMaskV, VecVal1, VecVal2);  in LowerFCOPYSIGN()
14175       EVT VecVT = EVT::getVectorVT(*DAG.getContext(), NewType, NumElts);  in LowerBUILD_VECTOR()  local
14176       SDValue Val = DAG.getBuildVector(VecVT, dl, Ops);  in LowerBUILD_VECTOR()
15186   EVT VecVT = Vec.getValueType();  in getVectorBitwiseReduce()  local
15187   assert(VecVT.isFixedLengthVector() && VecVT.isPow2VectorType() &&  in getVectorBitwiseReduce()
15190   EVT ElemVT = VecVT.getVectorElementType();  in getVectorBitwiseReduce()
15193   unsigned NumElems = VecVT.getVectorNumElements();  in getVectorBitwiseReduce()
15216         ExtendOp, DL, VecVT.changeVectorElementType(ExtendedVT), Vec);  in getVectorBitwiseReduce()
15235     while (VecVT.getSizeInBits() > 64) {  in getVectorBitwiseReduce()
15238       VecVT = Lo.getValueType();  in getVectorBitwiseReduce()
15239       NumElems = VecVT.getVectorNumElements();  in getVectorBitwiseReduce()
15240       Vec = DAG.getNode(ScalarOpcode, DL, VecVT, Lo, Hi);  in getVectorBitwiseReduce()
15243     EVT ScalarVT = EVT::getIntegerVT(*DAG.getContext(), VecVT.getSizeInBits());  in getVectorBitwiseReduce()
15734       EVT VecVT = Extract.getOperand(0).getValueType();  in shouldRemoveRedundantExtend()  local
15735       if (VecVT.getScalarType() == MVT::i8 || VecVT.getScalarType() == MVT::i16)  in shouldRemoveRedundantExtend()
19561   EVT VecVT = Vec.getValueType();  in performInsertSubvectorCombine()  local
19565   if (!VecVT.isFixedLengthVector() ||  in performInsertSubvectorCombine()
19566       !DAG.getTargetLoweringInfo().isTypeLegal(VecVT) ||  in performInsertSubvectorCombine()
19576   if ((SubVT.getSizeInBits() * 2) != VecVT.getSizeInBits() ||  in performInsertSubvectorCombine()
19593   return DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Lo, Hi);  in performInsertSubvectorCombine()
22724   EVT VecVT = Op.getValueType();  in tryGetOriginalBoolVectorType()  local
22725   assert(VecVT.isVector() && VecVT.getVectorElementType() == MVT::i1 &&  in tryGetOriginalBoolVectorType()
22738     if (Operand.getValueType() != VecVT)  in tryGetOriginalBoolVectorType()
22758   EVT VecVT = ComparisonResult.getValueType();  in vectorToScalarBitmask()  local
22759   assert(VecVT.isVector() && "Must be a vector type");  in vectorToScalarBitmask()
22761   unsigned NumElts = VecVT.getVectorNumElements();  in vectorToScalarBitmask()
22765   if (VecVT.getVectorElementType() != MVT::i1 &&  in vectorToScalarBitmask()
22766       !DAG.getTargetLoweringInfo().isTypeLegal(VecVT))  in vectorToScalarBitmask()
22771   if (VecVT.getVectorElementType() == MVT::i1) {  in vectorToScalarBitmask()
22772     VecVT = tryGetOriginalBoolVectorType(ComparisonResult);  in vectorToScalarBitmask()
22773     if (!VecVT.isSimple()) {  in vectorToScalarBitmask()
22775       VecVT = MVT::getVectorVT(MVT::getIntegerVT(BitsPerElement), NumElts);  in vectorToScalarBitmask()
22778   VecVT = VecVT.changeVectorElementTypeToInteger();  in vectorToScalarBitmask()
22783   if (VecVT.getSizeInBits() > 128)  in vectorToScalarBitmask()
22787   ComparisonResult = DAG.getSExtOrTrunc(ComparisonResult, DL, VecVT);  in vectorToScalarBitmask()
22791       VecVT == MVT::v16i8) {  in vectorToScalarBitmask()
22800     SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, VecVT, MaskConstants);  in vectorToScalarBitmask()
22802         DAG.getNode(ISD::AND, DL, VecVT, ComparisonResult, Mask);  in vectorToScalarBitmask()
22805         DAG.getNode(AArch64ISD::EXT, DL, VecVT, RepresentativeBits,  in vectorToScalarBitmask()
22807     SDValue Zipped = DAG.getNode(AArch64ISD::ZIP1, DL, VecVT,  in vectorToScalarBitmask()
22814   unsigned MaxBitMask = 1u << (VecVT.getVectorNumElements() - 1);  in vectorToScalarBitmask()
22819   SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, VecVT, MaskConstants);  in vectorToScalarBitmask()
22821       DAG.getNode(ISD::AND, DL, VecVT, ComparisonResult, Mask);  in vectorToScalarBitmask()
22823       NumElts, VecVT.getVectorElementType().getSizeInBits()));  in vectorToScalarBitmask()