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Searched refs:UseMO (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DInitUndef.cpp123 for (auto &UseMO : MI->uses()) { in handleReg() local
124 if (!UseMO.isReg()) in handleReg()
126 if (UseMO.isTied()) in handleReg()
128 if (!UseMO.getReg().isVirtual()) in handleReg()
131 if (UseMO.isUndef() || findImplictDefMIFromReg(UseMO.getReg(), MRI)) in handleReg()
132 Changed |= fixupIllOperand(MI, UseMO); in handleReg()
141 for (MachineOperand &UseMO : MI.uses()) { in handleSubReg()
142 if (!UseMO.isReg()) in handleSubReg()
144 if (!UseMO.getReg().isVirtual()) in handleSubReg()
146 if (UseMO.isTied()) in handleSubReg()
[all …]
H A DCodeGenCommonISel.cpp294 auto &UseMO = DbgMI->getOperand(UseMOIdx); in salvageDebugInfoForDbgValue() local
295 UseMO.setReg(Op0->getReg()); in salvageDebugInfoForDbgValue()
296 UseMO.setSubReg(Op0->getSubReg()); in salvageDebugInfoForDbgValue()
H A DTailDuplicator.cpp225 for (MachineOperand &UseMO : in tailDuplicateAndUpdate()
227 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate()
233 DebugUses.push_back(&UseMO); in tailDuplicateAndUpdate()
238 SSAUpdate.RewriteUse(UseMO); in tailDuplicateAndUpdate()
240 for (auto *UseMO : DebugUses) { in tailDuplicateAndUpdate() local
241 MachineInstr *UseMI = UseMO->getParent(); in tailDuplicateAndUpdate()
242 UseMO->setReg( in tailDuplicateAndUpdate()
H A DMachineCombiner.cpp282 MachineInstr *UseMO = RI->getParent(); in getLatency() local
284 if (UseMO && BlockTrace.isDepInTrace(*Root, *UseMO)) { in getLatency()
288 UseMO, in getLatency()
289 UseMO->findRegisterUseOperandIdx(MO.getReg(), /*TRI=*/nullptr)); in getLatency()
H A DPeepholeOptimizer.cpp820 for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg)) { in INITIALIZE_PASS_DEPENDENCY()
821 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY()
831 if (UseSrcSubIdx && UseMO.getSubReg() != SubIdx) in INITIALIZE_PASS_DEPENDENCY()
858 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
862 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
866 ExtendedUses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY()
892 for (MachineOperand *UseMO : Uses) { in INITIALIZE_PASS_DEPENDENCY()
893 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY()
926 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY()
928 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
H A DLiveVariables.cpp694 for (auto &UseMO : MRI->use_nodbg_operands(Reg)) { in recomputeForSingleDefVirtReg() local
695 UseMO.setIsKill(false); in recomputeForSingleDefVirtReg()
696 if (!UseMO.readsReg()) in recomputeForSingleDefVirtReg()
699 MachineInstr &UseMI = *UseMO.getParent(); in recomputeForSingleDefVirtReg()
705 unsigned Idx = UseMO.getOperandNo(); in recomputeForSingleDefVirtReg()
H A DRegisterCoalescer.cpp938 for (MachineOperand &UseMO : in removeCopyByCommutingDef()
940 if (UseMO.isUndef()) in removeCopyByCommutingDef()
942 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef()
946 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
955 UseMO.setIsKill(false); in removeCopyByCommutingDef()
957 UseMO.substPhysReg(NewReg, *TRI); in removeCopyByCommutingDef()
959 UseMO.setReg(NewReg); in removeCopyByCommutingDef()
1691 for (MachineOperand &UseMO : in reMaterializeTrivialDef()
1693 MachineInstr *UseMI = UseMO.getParent(); in reMaterializeTrivialDef()
1696 UseMO.substPhysReg(DstReg, *TRI); in reMaterializeTrivialDef()
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H A DMachineInstr.cpp1191 MachineOperand &UseMO = getOperand(UseIdx); in tieOperands() local
1193 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands()
1195 assert(!UseMO.isTied() && "Use is already tied to another def"); in tieOperands()
1198 UseMO.TiedTo = DefIdx + 1; in tieOperands()
1206 UseMO.TiedTo = TiedMax; in tieOperands()
1231 const MachineOperand &UseMO = getOperand(i); in findTiedOperandIdx() local
1232 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
H A DTwoAddressInstructionPass.cpp2005 MachineOperand &UseMO = MI.getOperand(i); in eliminateRegSequence() local
2006 Register SrcReg = UseMO.getReg(); in eliminateRegSequence()
2009 if (UseMO.isUndef()) { in eliminateRegSequence()
2016 bool isKill = UseMO.isKill(); in eliminateRegSequence()
2021 UseMO.setIsKill(false); in eliminateRegSequence()
2030 .add(UseMO); in eliminateRegSequence()
H A DModuloSchedule.cpp2339 for (MachineOperand &UseMO : MI->uses()) { in updateInstrUse()
2340 if (!UseMO.isReg() || !UseMO.getReg().isVirtual()) in updateInstrUse()
2343 Register OrigReg = UseMO.getReg(); in updateInstrUse()
2377 UseMO.setReg(NewReg); in updateInstrUse()
2384 UseMO.setReg(SplitReg); in updateInstrUse()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp277 MachineOperand &UseMO = *UI; in processBlock() local
278 MachineInstr *UseMI = UseMO.getParent(); in processBlock()
285 UseMO.substVirtReg(KilledProdReg, KilledProdSubReg, *TRI); in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LoadValueInjectionLoadHardening.cpp393 MachineOperand &UseMO = Use.Addr->getOp(); in getGadgetGraph() local
394 MachineInstr &UseMI = *UseMO.getParent(); in getGadgetGraph()
395 assert(UseMO.isReg()); in getGadgetGraph()
405 if (instrUsesRegToAccessMemory(UseMI, UseMO.getReg()) || in getGadgetGraph()
407 instrUsesRegToBranch(UseMI, UseMO.getReg()))) { in getGadgetGraph()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp295 for (MachineOperand &UseMO : MRI->use_nodbg_operands(Reg->getReg())) { in findSingleRegUse()
297 if (!isSameReg(UseMO, *Reg)) in findSingleRegUse()
302 ResMO = &UseMO; in findSingleRegUse()
303 } else if (ResMO->getParent() != UseMO.getParent()) { in findSingleRegUse()
403 for (MachineOperand &UseMO : getMRI()->use_nodbg_operands(Reg->getReg())) { in potentialToConvert()
405 assert(isSameReg(UseMO, *Reg)); in potentialToConvert()
408 MachineInstr *UseMI = UseMO.getParent(); in potentialToConvert()
H A DSIInstrInfo.h1115 const MachineOperand &UseMO, in isInlineConstant() argument
1117 assert(UseMO.getParent() == &MI); in isInlineConstant()
1118 int OpIdx = UseMO.getOperandNo(); in isInlineConstant()
H A DSIInstrInfo.cpp2589 MachineOperand *UseMO = nullptr; in reMaterialize() local
2593 if (UseMO) { in reMaterialize()
2594 UseMO = nullptr; in reMaterialize()
2597 UseMO = &CandMO; in reMaterialize()
2599 if (!UseMO || UseMO->getSubReg() == AMDGPU::NoSubRegister) in reMaterialize()
2602 unsigned Offset = RI.getSubRegIdxOffset(UseMO->getSubReg()); in reMaterialize()
2603 unsigned SubregSize = RI.getSubRegIdxSize(UseMO->getSubReg()); in reMaterialize()
2622 UseMO->setReg(DestReg); in reMaterialize()
2623 UseMO->setSubReg(AMDGPU::NoSubRegister); in reMaterialize()
H A DSIFoldOperands.cpp220 const MachineOperand &UseMO) const;
893 const MachineOperand &UseMO) const { in isUseSafeToFold()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp716 MachineIRBuilder &Builder, MachineInstr &DefMI, MachineOperand &UseMO, in InsertInsnsWithoutSideEffectsBeforeUse() argument
718 MachineOperand &UseMO)> in InsertInsnsWithoutSideEffectsBeforeUse()
720 MachineInstr &UseMI = *UseMO.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse()
726 MachineOperand *PredBB = std::next(&UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
734 Inserter(InsertBB, std::next(InsertPt), UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
739 Inserter(InsertBB, InsertBB->getFirstNonPHI(), UseMO); in InsertInsnsWithoutSideEffectsBeforeUse()
856 MachineOperand &UseMO) { in applyCombineExtendingLoads() argument
859 Observer.changingInstr(*UseMO.getParent()); in applyCombineExtendingLoads()
860 UseMO.setReg(PreviouslyEmitted->getOperand(0).getReg()); in applyCombineExtendingLoads()
861 Observer.changedInstr(*UseMO.getParent()); in applyCombineExtendingLoads()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp126 const MachineOperand &UseMO = MI.getOperand(UseOpIdx); in hasUndefinedPassthru() local
127 return UseMO.getReg() == RISCV::NoRegister || UseMO.isUndef(); in hasUndefinedPassthru()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp4350 const MachineOperand &UseMO = UseMI.getOperand(UseIdx); in getOperandLatency() local
4351 if (UseMO.isImplicit()) { in getOperandLatency()
4352 for (MCPhysReg SR : HRI.superregs(UseMO.getReg())) { in getOperandLatency()