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Searched refs:Strided (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h689 uint16_t Strided : 1; member
709 uint16_t Strided : 1; member
727 uint16_t Strided : 1; member
736 uint16_t Strided : 1; member
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVPseudos.td603 bits<1> Strided = Str;
618 let Fields = ["Masked", "Strided", "FF", "Log2SEW", "LMUL", "Pseudo"];
619 let PrimaryKey = ["Masked", "Strided", "FF", "Log2SEW", "LMUL"];
625 bits<1> Strided = Str;
634 let Fields = ["Masked", "Strided", "Log2SEW", "LMUL", "Pseudo"];
635 let PrimaryKey = ["Masked", "Strided", "Log2SEW", "LMUL"];
672 bits<1> Strided = Str;
682 let Fields = ["NF", "Masked", "Strided", "FF", "Log2SEW", "LMUL", "Pseudo"];
683 let PrimaryKey = ["NF", "Masked", "Strided", "FF", "Log2SEW", "LMUL"];
708 bits<1> Strided = Str;
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H A DRISCVScheduleV.td292 // 7.4.1. Vector Unit-Strided Mask
295 // 7.5. Vector Strided Instructions
551 // 7.4.1. Vector Unit-Strided Mask
553 // 7.5. Vector Strided Instructions
H A DRISCVInstrInfoV.td218 // Vector Strided Loads and Stores
281 // Strided Segment Loads and Stores
1095 // Vector Strided Instructions
1763 // Vector Strided Instructions
1809 // Vector Strided Segment Instructions
H A DRISCVSchedSiFive7.td509 // Strided loads and stores operate at one element per cycle and should be
610 // segment loads and stores. Strided segment loads and stores operate at up to
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Driscv_vector.td506 // 7.5. Vector Strided Instructions