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Searched refs:SignExtend64 (Results 1 – 25 of 92) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMatInt.cpp30 if (Highest12 != 0 && SignExtend64<52>(Val) == 0) { in generateInstSeq()
31 Insts.push_back(Inst(LoongArch::LU52I_D, SignExtend64<12>(Highest12))); in generateInstSeq()
39 Insts.push_back(Inst(LoongArch::ADDI_W, SignExtend64<12>(Lo12))); in generateInstSeq()
41 Insts.push_back(Inst(LoongArch::LU12I_W, SignExtend64<20>(Hi20))); in generateInstSeq()
49 Insts.push_back(Inst(LoongArch::LU32I_D, SignExtend64<20>(Higher20))); in generateInstSeq()
53 Insts.push_back(Inst(LoongArch::LU52I_D, SignExtend64<12>(Highest12))); in generateInstSeq()
/freebsd/contrib/llvm-project/lld/ELF/Arch/
H A DMips.cpp392 return SignExtend64<32>(read32(ctx, buf)); in getImplicitAddend()
397 return SignExtend64<28>(read32(ctx, buf) << 2); in getImplicitAddend()
403 return SignExtend64<16>(read32(ctx, buf)) << 16; in getImplicitAddend()
417 return SignExtend64<16>(read32(ctx, buf)); in getImplicitAddend()
420 return SignExtend64<16>(readShuffle<e>(ctx, buf)) << 16; in getImplicitAddend()
431 return SignExtend64<16>(readShuffle<e>(ctx, buf)); in getImplicitAddend()
433 return SignExtend64<9>(readShuffle<e>(ctx, buf) << 2); in getImplicitAddend()
435 return SignExtend64<18>(read32(ctx, buf) << 2); in getImplicitAddend()
437 return SignExtend64<21>(read32(ctx, buf) << 2); in getImplicitAddend()
439 return SignExtend64<23>(read32(ctx, buf) << 2); in getImplicitAddend()
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H A DAArch64.cpp280 return SignExtend64<16>(read16(ctx, buf)); in getImplicitAddend()
283 return SignExtend64<32>(read32(ctx, buf)); in getImplicitAddend()
319 return SignExtend64<16>(getBits(read32le(buf), 5, 20)); in getImplicitAddend()
325 return SignExtend64<16>(getBits(read32le(buf), 5, 18) << 2); in getImplicitAddend()
336 return SignExtend64<21>(getBits(read32le(buf), 5, 23) << 2); in getImplicitAddend()
342 return SignExtend64<12>(getBits(read32le(buf), 10, 21)); in getImplicitAddend()
356 return SignExtend64<21>((getBits(read32le(buf), 5, 23) << 2) | in getImplicitAddend()
363 return SignExtend64<28>(getBits(read32le(buf), 0, 25) << 2); in getImplicitAddend()
900 if (val != llvm::SignExtend64(val, 33)) in tryRelaxAdrpLdr()
915 SignExtend64(getAArch64Page(sym.getVA(ctx)) - in tryRelaxAdrpLdr()
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H A DSystemZ.cpp237 return SignExtend64<8>(*buf); in getImplicitAddend()
240 return SignExtend64<16>(read16be(buf)); in getImplicitAddend()
242 return SignExtend64<16>(read16be(buf)) << 1; in getImplicitAddend()
245 return SignExtend64<32>(read32be(buf)); in getImplicitAddend()
247 return SignExtend64<32>(read32be(buf)) << 1; in getImplicitAddend()
H A DX86.cpp245 return SignExtend64<8>(*buf); in getImplicitAddend()
248 return SignExtend64<16>(read16le(buf)); in getImplicitAddend()
274 return SignExtend64<32>(read32le(buf)); in getImplicitAddend()
276 return SignExtend64<32>(read32le(buf + 4)); in getImplicitAddend()
501 SignExtend64(sec.getRelocTargetVA(ctx, rel, secAddr + rel.offset), 32); in relocateAlloc()
H A DARM.cpp899 return SignExtend64<32>(read32(ctx, buf)); in getImplicitAddend()
901 return SignExtend64<31>(read32(ctx, buf)); in getImplicitAddend()
906 return SignExtend64<26>(read32(ctx, buf) << 2); in getImplicitAddend()
908 return SignExtend64<9>(read16(ctx, buf) << 1); in getImplicitAddend()
910 return SignExtend64<12>(read16(ctx, buf) << 1); in getImplicitAddend()
915 return SignExtend64<20>(((hi & 0x0400) << 10) | // S in getImplicitAddend()
927 return SignExtend64<22>(((hi & 0x7ff) << 12) | // imm11 in getImplicitAddend()
937 return SignExtend64<24>(((hi & 0x0400) << 14) | // S in getImplicitAddend()
952 return SignExtend64<16>(((val & 0x000f0000) >> 4) | (val & 0x00fff)); in getImplicitAddend()
963 return SignExtend64<16>(((hi & 0x000f) << 12) | // imm4 in getImplicitAddend()
H A DLoongArch.cpp311 return SignExtend64<32>(read32le(buf)); in getImplicitAddend()
622 if (((int64_t)val + 0x20000) != llvm::SignExtend64(val + 0x20000, 38)) in relocate()
646 val = SignExtend64<12>(val); in relocate()
1228 relocate(loc + 4, newRLo12, SignExtend64(symLocal, 64)); in tryGotToPCRel()
1286 uint64_t val = SignExtend64( in relocateAlloc()
1306 val = SignExtend64(sec.getRelocTargetVA(ctx, rel, secAddr + rel.offset), in relocateAlloc()
1334 val = SignExtend64(sec.getRelocTargetVA(ctx, rel, secAddr + rel.offset), in relocateAlloc()
1354 val = SignExtend64(sec.getRelocTargetVA(ctx, rel, secAddr + rel.offset), in relocateAlloc()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/LoongArch/
H A DEmulateInstructionLoongArch.cpp276 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBEQZ64()
299 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBNEZ64()
323 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBCEQZ64()
348 uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2); in EmulateBCNEZ64()
374 uint64_t next_pc = rj_val + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateJIRL64()
387 uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2); in EmulateB64()
404 uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2); in EmulateBL64()
428 uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateBEQ64()
454 uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateBNE64()
482 uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2); in EmulateBLT64()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp240 MCOperand::createImm(SignExtend64<20>(Imm << 2) + (Address & 0x3))); in decodeCallOperand()
247 Inst.addOperand(MCOperand::createImm(SignExtend64<18>(Imm))); in decodeJumpOperand()
259 if (!tryAddingSymbolicOperand(SignExtend64<12>(Imm) + 4 + Address, true, in decodeBranchOperand()
261 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeBranchOperand()
265 if (!tryAddingSymbolicOperand(SignExtend64<8>(Imm) + 4 + Address, true, in decodeBranchOperand()
267 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeBranchOperand()
287 SignExtend64<17>((Imm << 2) + 0x40000 + (Address & 0x3)))); in decodeL32ROperand()
294 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeImm8Operand()
302 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 8))); in decodeImm8_sh8Operand()
309 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeImm12Operand()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp91 int64_t Lo12 = SignExtend64<12>(Val); in generateInstSeqImpl()
102 int64_t LuiRes = SignExtend64<32>(Hi20 << 12); in generateInstSeqImpl()
136 int64_t Lo12 = SignExtend64<12>(Val); in generateInstSeqImpl()
333 int64_t LoVal = SignExtend64<32>(Val); in generateInstSeq()
334 int64_t HiVal = SignExtend64<32>(Val >> 32); in generateInstSeq()
420 int64_t Lo12 = SignExtend64<12>(Val); in generateInstSeq()
507 int64_t LoVal = SignExtend64<32>(Val); in generateTwoRegInstSeq()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp89 Imm = SignExtend64(Imm, ExtendFrom); in matchingImmOps()
211 return SignExtend64(SI.getImm(), 16) >= 0; in checkOpConstraints()
222 int64_t ExtendedSI = SignExtend64(SI.getImm(), 16); in checkOpConstraints()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp619 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeAddiGroupBranch()
656 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP35GroupBranchMMR6()
663 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP35GroupBranchMMR6()
668 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP35GroupBranchMMR6()
692 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodeDaddiGroupBranch()
729 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP37GroupBranchMMR6()
736 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP37GroupBranchMMR6()
741 Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 2 + 4; in DecodePOP37GroupBranchMMR6()
762 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP65GroupBranchMMR6()
801 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4; in DecodePOP75GroupBranchMMR6()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp265 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
291 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 2))); in decodeDispRIXOperand()
302 const int64_t Disp = SignExtend64<7>((Imm & 0x3F) + 64) * 8; in decodeDispRIHashOperand()
312 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 4))); in decodeDispRIX16Operand()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp768 idx = LSL(llvm::SignExtend64<7>(imm7), scale); in EmulateLDPSTP()
944 offset = llvm::SignExtend64<9>(Bits32(opcode, 20, 12)); in EmulateLDRSTRImm()
949 offset = llvm::SignExtend64<9>(Bits32(opcode, 20, 12)); in EmulateLDRSTRImm()
1080 int64_t offset = llvm::SignExtend64<28>(Bits32(opcode, 25, 0) << 2); in EmulateB()
1117 int64_t offset = llvm::SignExtend64<21>(Bits32(opcode, 23, 5) << 2); in EmulateBcond()
1145 int32_t offset = llvm::SignExtend64<21>(Bits32(opcode, 23, 5) << 2); in EmulateCBZ()
1181 int64_t offset = llvm::SignExtend64<16>(Bits32(opcode, 18, 5) << 2); in EmulateTBZ()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp232 int64_t Offset = SignExtend64<32>(LuiImmOp.getImm() << 12); in foldLargeOffset()
236 Offset = SignExtend64<32>(Offset); in foldLargeOffset()
251 int64_t Offset = SignExtend64<32>(OffsetTail.getOperand(1).getImm() << 12); in foldLargeOffset()
499 NewOffset = SignExtend64<32>(NewOffset); in foldIntoMemoryOps()
H A DRISCVCodeGenPrepare.cpp98 if (!isUInt<32>(C) || isInt<12>(C) || !isInt<12>(SignExtend64<32>(C))) in visitAnd()
102 C = SignExtend64<32>(C); in visitAnd()
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldMachOAArch64.h98 Addend = SignExtend64(Addend, 28); in decodeAddend()
111 Addend = SignExtend64(Addend, 33); in decodeAddend()
297 ExplicitAddend = SignExtend64(RawAddend, 24); in processRelocationRef()
500 SignExtend64(readBytesUnaligned(LocalAddress, NumBytes), NumBytes * 8); in processSubtractRelocation()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp335 int64_t CallOffset = SignExtend64(fieldFromInstruction(insn, 0, 30), 30) * 4; in DecodeCall()
345 MI.addOperand(MCOperand::createImm(SignExtend64<5>(insn))); in DecodeSIMM5()
352 MI.addOperand(MCOperand::createImm(SignExtend64<13>(insn))); in DecodeSIMM13()
360 int64_t BranchOffset = SignExtend64(ImmVal, N) * 4; in DecodeDisp()
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A Daarch32.cpp56 return SignExtend64<22>(Imm11H << 12 | Imm11L << 1); in decodeImmBT4BlT1BlxT2()
84 return SignExtend64<25>(S << 14 | I1 | I2 | Imm10 << 12 | Imm11 << 1); in decodeImmBT4BlT1BlxT2_J1J2()
102 return SignExtend64<26>((Value & 0x00ffffff) << 2); in decodeImmBA1BlA1BlxA2()
398 return SignExtend64<32>(support::endian::read32(FixupPtr, Endian)); in readAddendData()
400 return SignExtend64<31>(support::endian::read32(FixupPtr, Endian)); in readAddendData()
448 return SignExtend64<16>(decodeImmMovtT1MovwT3(R.Hi, R.Lo)); in readAddendThumb()
453 return SignExtend64<16>(decodeImmMovtT1MovwT3(R.Hi, R.Lo)); in readAddendThumb()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchMergeBaseOffset.cpp377 Offset += SignExtend64<32>(ImmOp.getImm() << 12) & Mask; in foldLargeOffset()
386 Offset += SignExtend64<52>(ImmOp.getImm() << 32) & Mask; in foldLargeOffset()
450 Offset = SignExtend64<32>(Offset << 16); in detectAndFoldOffset()
701 NewOffset = SignExtend64<32>(NewOffset); in foldIntoMemoryOps()
/freebsd/contrib/llvm-project/lld/ELF/
H A DTarget.h270 if (v != llvm::SignExtend64(v, n)) in checkInt()
287 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) in checkIntUInt()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp194 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
285 uint64_t Value = SignExtend64<N>(Imm) * 2; in decodePCDBLOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp172 return isInt<16>(SignExtend64(Src.getImm(), 32)) && in isKImmOperand()
183 if (isInt<16>(SignExtend64(Src.getImm(), 32))) { in isKImmOrKUImmOperand()
288 Src1.setImm(SignExtend64(Src1.getImm(), 32)); in shrinkScalarCompare()
915 Src1->setImm(SignExtend64(Src1->getImm(), 32)); in run()
938 Src.setImm(SignExtend64(Src.getImm(), 32)); in run()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16RegisterInfo.cpp129 Offset = SignExtend64<16>(NewImm); in eliminateFI()
/freebsd/contrib/llvm-project/lld/MachO/
H A DRelocations.h98 if (v != llvm::SignExtend64(v, bits)) in checkInt()

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