| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 232 uint64_t ShiftAmount = N->getConstantOperandVal(1); in LowerShifts() local
233 if (ShiftAmount == 16) { in LowerShifts()
249 SDValue Cnt = DAG.getTargetConstant(ShiftAmount, dl, MVT::i8); in LowerShifts()
300 uint64_t ShiftAmount = N->getConstantOperandVal(1); in LowerShifts() local
309 ShiftAmount = ShiftAmount % VT.getSizeInBits(); in LowerShifts()
313 ShiftAmount = ShiftAmount % VT.getSizeInBits(); in LowerShifts()
327 if (Op.getOpcode() == ISD::SHL && 4 <= ShiftAmount && ShiftAmount < 7) { in LowerShifts()
332 ShiftAmount -= 4; in LowerShifts()
333 } else if (Op.getOpcode() == ISD::SRL && 4 <= ShiftAmount && in LowerShifts()
334 ShiftAmount < 7) { in LowerShifts()
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| H A D | AVRShiftExpand.cpp | 95 Value *ShiftAmount = Builder.CreateTrunc(BI->getOperand(1), Int8Ty); in expand() local
99 Value *Cmp1 = Builder.CreateICmpEQ(ShiftAmount, Int8Zero); in expand()
106 ShiftAmountPHI->addIncoming(ShiftAmount, BB); in expand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/ |
| H A D | SPIRVBaseInfo.h | 286 for (unsigned ShiftAmount = 0; ShiftAmount < 32; ShiftAmount += 8) { in getSPIRVStringOperand() local
287 char c = (Imm >> ShiftAmount) & 0xff; in getSPIRVStringOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 139 int ShiftAmount = 0; in generateInstSeqImpl() local
144 ShiftAmount = llvm::countr_zero((uint64_t)Val); in generateInstSeqImpl()
145 Val >>= ShiftAmount; in generateInstSeqImpl()
150 if (ShiftAmount > 12 && !isInt<12>(Val)) { in generateInstSeqImpl()
154 ShiftAmount -= 12; in generateInstSeqImpl()
160 ShiftAmount -= 12; in generateInstSeqImpl()
179 if (ShiftAmount) { in generateInstSeqImpl()
181 Res.emplace_back(Opc, ShiftAmount); in generateInstSeqImpl()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | DivisionByConstantInfo.h | 25 unsigned ShiftAmount; ///< shift amount member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.cpp | 177 unsigned ShiftAmount = Log2(MaxAlignment); in emitPrologue() local
184 .addImm(ShiftAmount); in emitPrologue()
187 .addImm(ShiftAmount); in emitPrologue()
194 .addImm(ShiftAmount); in emitPrologue()
197 .addImm(ShiftAmount); in emitPrologue()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/ |
| H A D | IntegralAP.h | 309 unsigned ShiftAmount = B.getValue().getZExtValue(); in shiftRight() local
311 R->copy(A.getValue().ashr(ShiftAmount)); in shiftRight()
313 R->copy(A.getValue().lshr(ShiftAmount)); in shiftRight()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 439 uint32_t ShiftAmount = Log2_32(LMUL); in lowerVSPILL() local
440 if (ShiftAmount != 0) in lowerVSPILL()
443 .addImm(ShiftAmount); in lowerVSPILL()
522 uint32_t ShiftAmount = Log2_32(LMUL); in lowerVRELOAD() local
523 if (ShiftAmount != 0) in lowerVRELOAD()
526 .addImm(ShiftAmount); in lowerVRELOAD()
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| H A D | RISCVInstrInfo.cpp | 4494 uint32_t ShiftAmount = Log2_32(Amount); in mulImm() local
4495 if (ShiftAmount == 0) in mulImm()
4499 .addImm(ShiftAmount) in mulImm()
4507 uint32_t ShiftAmount; in mulImm() local
4510 ShiftAmount = Log2_64(Amount / 9); in mulImm()
4513 ShiftAmount = Log2_64(Amount / 5); in mulImm()
4516 ShiftAmount = Log2_64(Amount / 3); in mulImm()
4520 if (ShiftAmount) in mulImm()
4523 .addImm(ShiftAmount) in mulImm()
4531 uint32_t ShiftAmount = Log2_32(Amount - 1); in mulImm() local
[all …]
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| H A D | RISCVFrameLowering.cpp | 1125 unsigned ShiftAmount = Log2(MaxAlignment); in emitPrologue() local
1130 .addImm(ShiftAmount) in emitPrologue()
1134 .addImm(ShiftAmount) in emitPrologue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.h | 46 unsigned ShiftAmount) const;
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| H A D | MipsSEISelDAGToDAG.cpp | 279 unsigned ShiftAmount = 0) const { in selectAddrFrameIndexOffset() argument
282 if (isIntN(OffsetBits + ShiftAmount, CN->getSExtValue())) { in selectAddrFrameIndexOffset()
293 const Align Alignment(1ULL << ShiftAmount); in selectAddrFrameIndexOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | DivisionByConstantInfo.cpp | 63 Retval.ShiftAmount = P - D.getBitWidth(); // resulting shift in get()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 847 uint64_t ShiftAmount = N->getConstantOperandVal(1); in LowerShifts() local
852 if (ShiftAmount >= 8) { in LowerShifts()
872 ShiftAmount -= 8; in LowerShifts()
875 if (Opc == ISD::SRL && ShiftAmount) { in LowerShifts()
879 ShiftAmount -= 1; in LowerShifts()
882 while (ShiftAmount--) in LowerShifts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 286 int16_t ShiftAmount, SMLoc IDLoc, in emitDSLL() argument
288 if (ShiftAmount >= 32) { in emitDSLL()
289 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI); in emitDSLL()
293 emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI); in emitDSLL()
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| H A D | MipsMCCodeEmitter.h | 188 template <unsigned ShiftAmount = 0>
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| H A D | MipsTargetStreamer.h | 152 void emitDSLL(MCRegister DstReg, MCRegister SrcReg, int16_t ShiftAmount,
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| H A D | MipsMCCodeEmitter.cpp | 755 template <unsigned ShiftAmount>
766 OffBits >>= ShiftAmount; in getMemEncoding()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCasts.cpp | 429 unsigned ShiftAmount = ShiftVal ? ShiftVal->getZExtValue() : 0; in foldVecTruncToExtElt() local
431 if ((VecWidth % DestWidth != 0) || (ShiftAmount % DestWidth != 0)) in foldVecTruncToExtElt()
442 unsigned Elt = ShiftAmount / DestWidth; in foldVecTruncToExtElt()
477 const APInt *ShiftAmount = nullptr; in foldVecExtTruncToExtElt() local
481 m_APInt(ShiftAmount))))) in foldVecExtTruncToExtElt()
494 if (ShiftAmount) { in foldVecExtTruncToExtElt()
497 if (ShiftAmount->uge(SrcBits) || ShiftAmount->urem(DstBits) != 0) in foldVecExtTruncToExtElt()
500 uint64_t IdxOfs = ShiftAmount->udiv(DstBits).getZExtValue(); in foldVecExtTruncToExtElt()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 1767 static bool shiftAmountKnownInRange(Register ShiftAmount, in shiftAmountKnownInRange() argument
1769 LLT Ty = MRI.getType(ShiftAmount); in shiftAmountKnownInRange()
1776 getIConstantVRegValWithLookThrough(ShiftAmount, MRI); in shiftAmountKnownInRange()
1782 GBuildVector *BV = getOpcodeDef<GBuildVector>(ShiftAmount, MRI); in shiftAmountKnownInRange()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 445 unsigned ShiftAmount; member
634 return ShiftedImm.ShiftAmount; in getShiftedImmShift()
1001 unsigned Shift = ShiftedImm.ShiftAmount; in isAddSubImm()
2314 unsigned ShiftAmount = 0, in CreateReg() argument
2322 Op->Reg.ShiftExtend.Amount = ShiftAmount; in CreateReg()
2333 unsigned ShiftAmount = 0, in CreateVectorReg() argument
2339 auto Op = CreateReg(RegNum, Kind, S, E, Ctx, EqualsReg, ExtTy, ShiftAmount, in CreateVectorReg()
2418 unsigned ShiftAmount, in CreateShiftedImm() argument
2423 Op->ShiftedImm.ShiftAmount = ShiftAmount; in CreateShiftedImm()
3470 int64_t ShiftAmount = getTok().getIntVal(); in tryParseImmWithOptionalShift() local
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 7320 static bool shiftAmountKnownInRange(const Value *ShiftAmount) { in shiftAmountKnownInRange() argument
7321 auto *C = dyn_cast<Constant>(ShiftAmount); in shiftAmountKnownInRange()
9676 unsigned ShiftAmount = Width - 1; in setLimitsForBinOp() local
9678 ShiftAmount = C->countr_zero(); in setLimitsForBinOp()
9682 Upper = C->ashr(ShiftAmount) + 1; in setLimitsForBinOp()
9685 Lower = C->ashr(ShiftAmount); in setLimitsForBinOp()
9697 unsigned ShiftAmount = Width - 1; in setLimitsForBinOp() local
9699 ShiftAmount = C->countr_zero(); in setLimitsForBinOp()
9700 Lower = C->lshr(ShiftAmount); in setLimitsForBinOp()
9714 unsigned ShiftAmount = C->countl_one() - 1; in setLimitsForBinOp() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 2018 uint64_t ShiftAmount = V.getConstantOperandVal(1); in factorOutPowerOf2() local
2019 if (ShiftAmount == Power) in factorOutPowerOf2()
2021 Ops[1] = CurDAG->getConstant(ShiftAmount - Power, in factorOutPowerOf2()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 1451 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, DL, VT); in ExpandSIGN_EXTEND_VECTOR_INREG() local
1453 DAG.getNode(ISD::SHL, DL, VT, Op, ShiftAmount), in ExpandSIGN_EXTEND_VECTOR_INREG()
1454 ShiftAmount); in ExpandSIGN_EXTEND_VECTOR_INREG()
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| H A D | TargetLowering.cpp | 2390 unsigned ShiftAmount = NLZ > NTZ ? NLZ - NTZ : NTZ - NLZ; in SimplifyDemandedBits() local
2391 SDValue ShAmt = TLO.DAG.getShiftAmountConstant(ShiftAmount, VT, dl); in SimplifyDemandedBits()
6549 magics.ShiftAmount = 0; in BuildSDIV()
6561 Shifts.push_back(DAG.getConstant(magics.ShiftAmount, dl, ShSVT)); in BuildSDIV()
7844 unsigned ShiftAmount = OuterBitSize - InnerBitSize; in expandMUL_LOHI() local
7845 SDValue Shift = DAG.getShiftAmountConstant(ShiftAmount, VT, dl); in expandMUL_LOHI()
10159 SDValue ShiftAmount = DAG.getShiftAmountConstant( in scalarizeVectorLoad() local
10161 SDValue ShiftedElt = DAG.getNode(ISD::SRL, SL, LoadVT, Load, ShiftAmount); in scalarizeVectorLoad()
10241 SDValue ShiftAmount = in scalarizeVectorStore() local
10244 DAG.getNode(ISD::SHL, SL, IntVT, ExtElt, ShiftAmount); in scalarizeVectorStore()
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