Searched refs:RootReg (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveRegUnits.cpp | 24 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) { in removeRegsNotPreserved() local
25 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg)) { in removeRegsNotPreserved()
35 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) { in addRegsInMask() local
36 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg)) { in addRegsInMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 354 Register RootReg = Root.getReg(); in selectSExtBits() local
355 MachineInstr *RootDef = MRI->getVRegDef(RootReg); in selectSExtBits()
363 unsigned Size = MRI->getType(RootReg).getScalarSizeInBits(); in selectSExtBits()
364 if ((Size - VT->computeNumSignBits(RootReg)) < Bits) in selectSExtBits()
375 Register RootReg = Root.getReg(); in selectZExtBits() local
379 if (mi_match(RootReg, *MRI, m_GAnd(m_Reg(RegX), m_SpecificICst(Mask)))) { in selectZExtBits()
383 if (mi_match(RootReg, *MRI, m_GZExt(m_Reg(RegX))) && in selectZExtBits()
387 unsigned Size = MRI->getType(RootReg).getScalarSizeInBits(); in selectZExtBits()
388 if (VT->maskedValueIsZero(RootReg, APInt::getBitsSetFrom(Size, Bits))) in selectZExtBits()
401 Register RootReg = Root.getReg(); in selectSHXADDOp() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.h | 191 selectVOP3PModsImpl(Register RootReg, const MachineRegisterInfo &MRI,
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| H A D | AMDGPUInstructionSelector.cpp | 4766 Register RootReg, const SIInstrInfo &TII, in isValidToPack() argument
4772 return isSameBitWidth(NewReg, RootReg, MRI) && IsHalfState(LoStat) && in isValidToPack()
4777 Register RootReg, const MachineRegisterInfo &MRI, bool IsDOT) const { in selectVOP3PModsImpl() argument
4780 if (isVectorOfTwoOrScalar(RootReg, MRI) != TypeClass::VECTOR_OF_TWO) { in selectVOP3PModsImpl()
4782 return {RootReg, Mods}; in selectVOP3PModsImpl()
4785 SearchOptions SO(RootReg, MRI); in selectVOP3PModsImpl()
4787 std::pair<Register, SrcStatus> Stat = getLastSameOrNeg(RootReg, MRI, SO); in selectVOP3PModsImpl()
4824 StatlistHi[I].first, RootReg, TII, MRI)) in selectVOP3PModsImpl()
4852 static Register getLegalRegBank(Register NewReg, Register RootReg, in getLegalRegBank() argument
4859 if (checkRB(RootReg, AMDGPU::SGPRRegBankID, RBI, MRI, TRI) || in getLegalRegBank()
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