4766                           Register RootReg, const SIInstrInfo &TII,  in isValidToPack()  argument
4772   return isSameBitWidth(NewReg, RootReg, MRI) && IsHalfState(LoStat) &&  in isValidToPack()
4777     Register RootReg, const MachineRegisterInfo &MRI, bool IsDOT) const {  in selectVOP3PModsImpl()  argument
4780   if (isVectorOfTwoOrScalar(RootReg, MRI) != TypeClass::VECTOR_OF_TWO) {  in selectVOP3PModsImpl()
4782     return {RootReg, Mods};  in selectVOP3PModsImpl()
4785   SearchOptions SO(RootReg, MRI);  in selectVOP3PModsImpl()
4787   std::pair<Register, SrcStatus> Stat = getLastSameOrNeg(RootReg, MRI, SO);  in selectVOP3PModsImpl()
4824                         StatlistHi[I].first, RootReg, TII, MRI))  in selectVOP3PModsImpl()
4852 static Register getLegalRegBank(Register NewReg, Register RootReg,  in getLegalRegBank()  argument
4859   if (checkRB(RootReg, AMDGPU::SGPRRegBankID, RBI, MRI, TRI) ||  in getLegalRegBank()
4863   MachineInstr *MI = MRI.getVRegDef(RootReg);  in getLegalRegBank()
4866     return RootReg;  in getLegalRegBank()
4870   Register DstReg = MRI.cloneVirtualRegister(RootReg);  in getLegalRegBank()