Home
last modified time | relevance | path

Searched refs:RTS (Results 1 – 25 of 79) sorted by relevance

1234

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVAsmPrinter.cpp450 RISCVTargetStreamer &RTS = in emitDirectiveOptionArch() local
466 RTS.emitDirectiveOptionPush(); in emitDirectiveOptionArch()
467 RTS.emitDirectiveOptionArch(NeedEmitStdOptionArgs); in emitDirectiveOptionArch()
476 RISCVTargetStreamer &RTS = in runOnMachineFunction() local
488 RTS.emitDirectiveOptionPop(); in runOnMachineFunction()
546 RISCVTargetStreamer &RTS = in emitStartOfAsmFile() local
550 RTS.setTargetABI(RISCVABI::getTargetABI(ModuleTargetABI->getString())); in emitStartOfAsmFile()
572 RTS.setFlagsFromFeatures(SubtargetInfo); in emitStartOfAsmFile()
580 RISCVTargetStreamer &RTS = in emitEndOfAsmFile() local
584 RTS.finishAttributeSection(); in emitEndOfAsmFile()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-phygate-tauri-l-rs232-rts-cts.dtso6 * Tauri-L RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dts5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dts5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
H A Dimx8mp-dhcom-drc02.dts184 * DHCOM UART1 RTS/CTS pins. Therefore this UART have to use DHCOM GPIOs
185 * for RTS/CTS. So configure DHCOM GPIO I as RTS and GPIO M as CTS.
197 * controlled by DHCOM GPIO P. So remove RTS/CTS pins and the property
H A Dimx8mq-hummingboard-pulse.dts166 * reconfigured to enable RTS/CTS on UART3
209 * Header. To use RTS/CTS on UART3 comment them out
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Dfsl-mxs-auart.txt22 - uart-has-rtscts : Indicate the UART has RTS and CTS lines
25 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
H A Dcirrus,clps711x-uart.txt11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
H A Dsirf-uart.txt13 - rts-gpios: RTS pin for USP-based UART if uart-has-rtscts is true
H A Domap_serial.txt26 - rs485-rts-active-high: drive RTS high when sending (default is low).
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull-dhcom-drc02.dts23 * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
24 * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
H A Dimx6ul-ccimx6ulsbcpro.dts62 /* CAN2 is multiplexed with UART2 RTS/CTS */
200 /* UART2 RTS/CTS muxed with CAN2 */
208 /* UART3 RTS/CTS muxed with CAN 1 */
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-netcom-plus-2xx.dts26 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
39 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-a64-sopine-baseboard.dts189 /* On Wifi/BT connector, with RTS/CTS */
211 /* On Euler connector, RTS/CTS optional */
H A Dsun50i-a64-orangepi-win.dts382 /* On Pi-2 connector, RTS/CTS optional */
389 /* On Pi-2 connector, RTS/CTS optional */
396 /* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
H A Dsun50i-a64-pine64.dts296 /* On Wifi/BT connector, with RTS/CTS */
318 /* On Euler connector, RTS/CTS optional */
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-dbx5x0-pinctrl.dtsi21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
32 pins = "GPIO1_AJ3"; /* RTS */
79 pins = "GPIO7_AG5"; /* RTS */
90 pins = "GPIO7_AG5"; /* RTS */
H A Dstm32mp157a-iot-box.dts57 /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
H A Dstm32mp153c-lxa-fairytux2-gen1.dts94 * On Gen 1 FairyTux 2 only RTS can be used and not CTS as well,
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dserial.txt14 CTS, RTS, DCD, DSR, DTR, and RI.
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr9a08g045s33-smarc-pmod1-type-3a.dtso37 <RZG2L_PORT_PINMUX(16, 1, 1)>; /* RTS# */
H A Drzg2lc-smarc-pinfunction.dtsi71 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
/freebsd/stand/i386/boot2/
H A Dsio.S38 movb $0x3,%al # Set RTS,

1234