Searched refs:MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO (Results 1 – 2 of 2) sorted by relevance
2950 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO); in mlx5e_hw_lro_set_tir_ctx()
2717 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2, enumerator