Searched refs:MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO (Results 1 – 2 of 2) sorted by relevance
2949 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO | in mlx5e_hw_lro_set_tir_ctx()
2716 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1, enumerator