| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 1550 unsigned HalfSize = Mask.size() / 2; in lowerVECTOR_SHUFFLE_VILVH() local
1553 if (fitsRegularPattern<int>(Begin, 2, End, HalfSize, 1)) in lowerVECTOR_SHUFFLE_VILVH()
1555 else if (fitsRegularPattern<int>(Begin, 2, End, Mask.size() + HalfSize, 1)) in lowerVECTOR_SHUFFLE_VILVH()
1560 if (fitsRegularPattern<int>(Begin + 1, 2, End, HalfSize, 1)) in lowerVECTOR_SHUFFLE_VILVH()
1562 else if (fitsRegularPattern<int>(Begin + 1, 2, End, Mask.size() + HalfSize, in lowerVECTOR_SHUFFLE_VILVH()
1810 unsigned HalfSize = Mask.size() / 2; in lowerVECTOR_SHUFFLE_XVREPLVEI() local
1813 if (fitsRegularPattern<int>(Begin, 1, End - HalfSize, SplatIndex, 0) && in lowerVECTOR_SHUFFLE_XVREPLVEI()
1814 fitsRegularPattern<int>(Begin + HalfSize, 1, End, SplatIndex + HalfSize, in lowerVECTOR_SHUFFLE_XVREPLVEI()
1856 unsigned HalfSize = Mask.size() / 2; in lowerVECTOR_SHUFFLE_XVILVH() local
1857 unsigned LeftSize = HalfSize / 2; in lowerVECTOR_SHUFFLE_XVILVH()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ShuffleDecode.cpp | 283 unsigned HalfSize = NumElts / 2; in DecodeVPERM2X128Mask() local
287 unsigned HalfBegin = (HalfMask & 0x3) * HalfSize; in DecodeVPERM2X128Mask()
288 for (unsigned i = HalfBegin, e = HalfBegin + HalfSize; i != e; ++i) in DecodeVPERM2X128Mask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 412 unsigned HalfSize = DstTy.getScalarSizeInBits() / 2; in matchCombineMulCMLT() local
413 if (!V1.value().isMask(HalfSize) || V2.value() != (1ULL | 1ULL << HalfSize) || in matchCombineMulCMLT()
414 V3 != (HalfSize - 1)) in matchCombineMulCMLT()
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_mve_defs.td | 318 class HalfSize<Type k> : ComplexType<(CTO_ScaleSize<1, 2> k)>;
339 def HalfScalar: HalfSize<Scalar>;
341 def UHalfScalar: Unsigned<HalfSize<Scalar>>;
398 def imm_1toHalfN : Immediate<sint, IB_EltBit<1, HalfSize<Scalar>>>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 2850 unsigned HalfSize = Indices.size() / 2; in lowerVECTOR_SHUFFLE_ILVL() local
2858 if (fitsRegularPattern<int>(Begin, 2, End, HalfSize, 1)) in lowerVECTOR_SHUFFLE_ILVL()
2860 else if (fitsRegularPattern<int>(Begin, 2, End, Indices.size() + HalfSize, 1)) in lowerVECTOR_SHUFFLE_ILVL()
2867 if (fitsRegularPattern<int>(Begin + 1, 2, End, HalfSize, 1)) in lowerVECTOR_SHUFFLE_ILVL()
2869 else if (fitsRegularPattern<int>(Begin + 1, 2, End, Indices.size() + HalfSize, in lowerVECTOR_SHUFFLE_ILVL()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 3330 unsigned HalfSize = NumElts / 2; in upgradeX86IntrinsicCall() local
3342 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; in upgradeX86IntrinsicCall()
3343 for (unsigned i = 0; i < HalfSize; ++i) in upgradeX86IntrinsicCall()
3347 StartIndex = (Imm & 0x10) ? HalfSize : 0; in upgradeX86IntrinsicCall()
3348 for (unsigned i = 0; i < HalfSize; ++i) in upgradeX86IntrinsicCall()
3349 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; in upgradeX86IntrinsicCall()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2433 unsigned HalfSize = Size / 2; in applyCombineShiftToUnmerge() local
2434 assert(ShiftVal >= HalfSize); in applyCombineShiftToUnmerge()
2436 LLT HalfTy = LLT::scalar(HalfSize); in applyCombineShiftToUnmerge()
2439 unsigned NarrowShiftAmt = ShiftVal - HalfSize; in applyCombineShiftToUnmerge()
2473 Builder.buildConstant(HalfTy, HalfSize - 1)); in applyCombineShiftToUnmerge()
2475 if (ShiftVal == HalfSize) { in applyCombineShiftToUnmerge()
2488 Builder.buildConstant(HalfTy, ShiftVal - HalfSize)); in applyCombineShiftToUnmerge()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 13349 unsigned HalfSize = VecWidth / 2; in isConstantSplat() local
13350 APInt HighValue = SplatValue.extractBits(HalfSize, HalfSize); in isConstantSplat()
13351 APInt LowValue = SplatValue.extractBits(HalfSize, 0); in isConstantSplat()
13352 APInt HighUndef = SplatUndef.extractBits(HalfSize, HalfSize); in isConstantSplat()
13353 APInt LowUndef = SplatUndef.extractBits(HalfSize, 0); in isConstantSplat()
13357 MinSplatBits > HalfSize) in isConstantSplat()
13363 VecWidth = HalfSize; in isConstantSplat()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 956 unsigned HalfSize = Width / 2; in SystemZVectorConstantInfo() local
957 APInt HighValue = SplatBits.lshr(HalfSize).trunc(HalfSize); in SystemZVectorConstantInfo()
958 APInt LowValue = SplatBits.trunc(HalfSize); in SystemZVectorConstantInfo()
961 if (HighValue != LowValue || 8 > HalfSize) in SystemZVectorConstantInfo()
965 Width = HalfSize; in SystemZVectorConstantInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 10214 unsigned HalfSize = Mask.size() / 2; in hasIdenticalHalvesShuffleMask() local
10215 for (unsigned i = 0; i != HalfSize; ++i) { in hasIdenticalHalvesShuffleMask()
10216 if (Mask[i] != Mask[i + HalfSize]) in hasIdenticalHalvesShuffleMask()
12235 int HalfSize = Size / 2; in matchShuffleAsEXTRQ() local
12245 int Len = HalfSize; in matchShuffleAsEXTRQ()
12263 if (i > M || M >= HalfSize) in matchShuffleAsEXTRQ()
12277 assert((Idx + Len) <= HalfSize && "Illegal extraction mask"); in matchShuffleAsEXTRQ()
12291 int HalfSize = Size / 2; in matchShuffleAsINSERTQ() local
12298 for (int Idx = 0; Idx != HalfSize; ++Idx) { in matchShuffleAsINSERTQ()
12314 for (int Hi = Idx + 1; Hi <= HalfSize; ++Hi) { in matchShuffleAsINSERTQ()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5187 unsigned HalfSize = EltSize / 2; in isExtendedBUILD_VECTOR() local
5189 if (!isIntN(HalfSize, C->getSExtValue())) in isExtendedBUILD_VECTOR()
5192 if (!isUIntN(HalfSize, C->getZExtValue())) in isExtendedBUILD_VECTOR()
18771 unsigned HalfSize = VT.getScalarSizeInBits() / 2; in performMulVectorCmpZeroCombine() local
18772 if (!V1.isMask(HalfSize) || V2 != (1ULL | 1ULL << HalfSize) || in performMulVectorCmpZeroCombine()
18773 V3 != (HalfSize - 1)) in performMulVectorCmpZeroCombine()
18777 EVT::getIntegerVT(*DAG.getContext(), HalfSize), in performMulVectorCmpZeroCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 16190 unsigned HalfSize = VT.getScalarSizeInBits() / 2; in combineVectorMulToSraBitcast() local
16191 if (!V1.isMask(HalfSize) || V2 != (1ULL | 1ULL << HalfSize) || in combineVectorMulToSraBitcast()
16192 V3 != (HalfSize - 1)) in combineVectorMulToSraBitcast()
16196 EVT::getIntegerVT(*DAG.getContext(), HalfSize), in combineVectorMulToSraBitcast()
16201 DAG.getConstant(HalfSize - 1, DL, HalfVT)); in combineVectorMulToSraBitcast()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9503 unsigned HalfSize = EltSize / 2; in isExtendedBUILD_VECTOR() local
9505 if (!isIntN(HalfSize, C->getSExtValue())) in isExtendedBUILD_VECTOR()
9508 if (!isUIntN(HalfSize, C->getZExtValue())) in isExtendedBUILD_VECTOR()
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