| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 99 DAG_FUNCTION(round, 1, 0, experimental_constrained_round, FROUND)
|
| H A D | VPIntrinsics.def | 419 VP_PROPERTY_FUNCTIONAL_SDOPC(FROUND)
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1037 FROUND, enumerator
|
| H A D | BasicTTIImpl.h | 2355 ISD = ISD::FROUND; in getTypeBasedIntrinsicInstrCost()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 933 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering()
934 setOperationAction(ISD::FROUND, MVT::v2f16, Expand); in NVPTXTargetLowering()
935 setOperationAction(ISD::FROUND, MVT::v2bf16, Expand); in NVPTXTargetLowering()
936 setOperationAction(ISD::FROUND, MVT::f32, Custom); in NVPTXTargetLowering()
937 setOperationAction(ISD::FROUND, MVT::f64, Custom); in NVPTXTargetLowering()
938 setOperationAction(ISD::FROUND, MVT::bf16, Promote); in NVPTXTargetLowering()
939 AddPromotedToType(ISD::FROUND, MVT::bf16, MVT::f32); in NVPTXTargetLowering()
2917 case ISD::FROUND: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 255 case ISD::FROUND: return "fround"; in getOperationName()
|
| H A D | LegalizeFloatTypes.cpp | 141 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1614 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
2849 case ISD::FROUND: in PromoteFloatResult()
3335 case ISD::FROUND: in SoftPromoteHalfResult()
|
| H A D | LegalizeVectorOps.cpp | 438 case ISD::FROUND: in LegalizeOp()
1303 case ISD::FROUND: in Expand()
|
| H A D | LegalizeDAG.cpp | 3506 SDValue RoundNode = DAG.getNode(ISD::FROUND, dl, ArgVT, Arg); in ExpandNode()
4828 case ISD::FROUND: in ConvertNodeToLibcall()
5795 case ISD::FROUND: in PromoteNode()
|
| H A D | LegalizeVectorTypes.cpp | 117 case ISD::FROUND: in ScalarizeVectorResult()
1248 case ISD::FROUND: in SplitVectorResult()
4915 case ISD::FROUND: in WidenVectorResult()
|
| H A D | SelectionDAGBuilder.cpp | 6845 case Intrinsic::round: Opcode = ISD::FROUND; break; in visitIntrinsicCall()
9511 if (visitUnaryFloatCall(I, ISD::FROUND)) in visitCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 859 setOperationAction({ISD::FROUND, ISD::FPOWI, ISD::FLDEXP, ISD::FFREXP, in initActions()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoF.td | 46 : RVSDNode<"FROUND", SDT_RISCVFROUND>;
|
| H A D | RISCVISelLowering.cpp | 471 ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering()
482 ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering()
1019 ISD::FROUND, in RISCVTargetLowering()
1084 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
1515 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
3223 case ISD::FROUND: in matchRoundingOp()
3317 case ISD::FROUND: in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND()
3482 return DAG.getNode(RISCVISD::FROUND, DL, VT, Src, MaxValNode, in lowerFTRUNC_FCEIL_FFLOOR_FROUND()
7722 case ISD::FROUND: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 471 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
476 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
1048 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
1049 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
1054 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
1055 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
1257 setOperationAction(ISD::FROUND, MVT::f128, Legal); in PPCTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 372 setOperationAction(ISD::FROUND, VT, Legal); in addMVEVectorTypes()
1470 setOperationAction(ISD::FROUND, MVT::f32, Legal); in ARMTargetLowering()
1487 setOperationAction(ISD::FROUND, MVT::f64, Legal); in ARMTargetLowering()
1514 setOperationAction(ISD::FROUND, MVT::f16, Legal); in ARMTargetLowering()
1538 setOperationAction(ISD::FROUND, MVT::v2f32, Legal); in ARMTargetLowering()
1539 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in ARMTargetLowering()
1563 setOperationAction(ISD::FROUND, MVT::v4f16, Legal); in ARMTargetLowering()
1564 setOperationAction(ISD::FROUND, MVT::v8f16, Legal); in ARMTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 801 ISD::FROUND, in AArch64TargetLowering()
849 setOperationPromotedToType(ISD::FROUND, V4Narrow, MVT::v4f32); in AArch64TargetLowering()
880 setOperationAction(ISD::FROUND, V8Narrow, Legal); in AArch64TargetLowering()
903 ISD::FRINT, ISD::FTRUNC, ISD::FROUND, in AArch64TargetLowering()
1243 ISD::FEXP10, ISD::FRINT, ISD::FROUND, in AArch64TargetLowering()
1404 ISD::FROUND, ISD::FROUNDEVEN, ISD::FMAXNUM_IEEE, ISD::FMINNUM_IEEE, in AArch64TargetLowering()
1700 setOperationAction(ISD::FROUND, VT, Custom); in AArch64TargetLowering()
1782 ISD::FROUND, ISD::FROUNDEVEN, ISD::FSQRT, ISD::FTRUNC, ISD::SETCC, in AArch64TargetLowering()
2307 setOperationAction(ISD::FROUND, VT, Default); in addTypeForFixedLengthSVE()
7298 case ISD::FROUND: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 400 setOperationAction(ISD::FROUND, {MVT::f32, MVT::f64}, Custom); in AMDGPUTargetLowering()
1445 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
|
| H A D | AMDGPUISelDAGToDAG.cpp | 160 case ISD::FROUND: in fp16SrcZerosHighBits()
|
| H A D | SIISelLowering.cpp | 223 ISD::FROUND, ISD::FROUNDEVEN, ISD::FFLOOR, ISD::FCANONICALIZE, in SITargetLowering()
616 ISD::FSIN, ISD::FROUND}, in SITargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 575 def fround : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 574 setOperationAction(ISD::FROUND, VT, Legal); in SystemZTargetLowering()
639 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in SystemZTargetLowering()
682 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in SystemZTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 192 setOperationAction(ISD::FROUND, MVT::f16, Promote); in MipsSETargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1726 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 637 setOperationAction(ISD::FROUND, VT, Action); in X86TargetLowering()
1365 setOperationAction(ISD::FROUND, RoundedTy, Custom); in X86TargetLowering()
1466 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
1923 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
2261 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
33640 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
46810 case ISD::FROUND: in scalarizeExtEltFP()
|