| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 453 unsigned ExtendOp = TargetOpcode::G_ANYEXT; in lowerReturn() local
455 ExtendOp = TargetOpcode::G_SEXT; in lowerReturn()
457 ExtendOp = TargetOpcode::G_ZEXT; in lowerReturn()
472 CurVReg = MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}) in lowerReturn()
493 CurVReg = MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}) in lowerReturn()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 322 unsigned ExtendOp = TargetOpcode::G_ANYEXT; in lowerReturnVal() local
325 ExtendOp = TargetOpcode::G_SEXT; in lowerReturnVal()
328 ExtendOp = TargetOpcode::G_ZEXT; in lowerReturnVal()
332 extOpcodeToISDExtOpcode(ExtendOp)); in lowerReturnVal()
336 Reg = B.buildInstr(ExtendOp, {ExtTy}, {Reg}).getReg(0); in lowerReturnVal()
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| H A D | AMDGPURegisterBankInfo.cpp | 2567 unsigned ExtendOp = getExtendOp(MI.getOpcode()); in applyMappingImpl() local
2569 = unpackV2S16ToS32(B, MI.getOperand(1).getReg(), ExtendOp); in applyMappingImpl()
2571 = unpackV2S16ToS32(B, MI.getOperand(2).getReg(), ExtendOp); in applyMappingImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 559 unsigned ExtendOp = TargetOpcode::G_ANYEXT) { in buildCopyToRegs() argument
568 B.buildInstr(ExtendOp, {DstRegs[0]}, {SrcReg}); in buildCopyToRegs()
630 UnmergeSrc = B.buildInstr(ExtendOp, {CoverTy}, {SrcReg}).getReg(0); in buildCopyToRegs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2119 unsigned ExtendOp = in EmitCmp() local
2121 Op0 = DAG.getNode(ExtendOp, DL, MVT::i32, Op0); in EmitCmp()
2122 Op1 = DAG.getNode(ExtendOp, DL, MVT::i32, Op1); in EmitCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 901 unsigned ExtendOp = in LegalizeLoadOps() local
903 Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load); in LegalizeLoadOps()
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| H A D | TargetLowering.cpp | 10167 unsigned ExtendOp = ISD::getExtForLoadExtType(false, ExtType); in scalarizeVectorLoad() local
10168 Scalar = DAG.getNode(ExtendOp, SL, DstEltVT, Scalar); in scalarizeVectorLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 1276 template <typename ExtendOp> struct ExtendOpTraits {
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23464 unsigned ExtendOp = in EmitCmp() local
23471 ExtendOp = ISD::SIGN_EXTEND; in EmitCmp()
23474 ExtendOp = ISD::SIGN_EXTEND; in EmitCmp()
23479 Op0 = DAG.getNode(ExtendOp, dl, CmpVT, Op0); in EmitCmp()
23480 Op1 = DAG.getNode(ExtendOp, dl, CmpVT, Op1); in EmitCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 15993 unsigned ExtendOp = in getVectorBitwiseReduce() local
15996 ExtendOp, DL, VecVT.changeVectorElementType(ExtendedVT), Vec); in getVectorBitwiseReduce()
|