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Searched refs:DemandedElts (Results 1 – 25 of 66) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelValueTracking.cpp88 APInt DemandedElts = in getKnownBits() local
90 return getKnownBits(R, DemandedElts); in getKnownBits()
94 const APInt &DemandedElts, in getKnownBits() argument
100 computeKnownBitsImpl(R, Known, DemandedElts, Depth); in getKnownBits()
133 const APInt &DemandedElts, in computeKnownBitsMin() argument
136 computeKnownBitsImpl(Src1, Known, DemandedElts, Depth); in computeKnownBitsMin()
143 computeKnownBitsImpl(Src0, Known2, DemandedElts, Depth); in computeKnownBitsMin()
164 const APInt &DemandedElts, in computeKnownBitsImpl() argument
181 DstTy.getNumElements() == DemandedElts.getBitWidth() && in computeKnownBitsImpl()
184 assert(DemandedElts.getBitWidth() == 1 && DemandedElts == APInt(1, 1) && in computeKnownBitsImpl()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGISelValueTracking.h44 const APInt &DemandedElts, unsigned Depth = 0);
47 const APInt &DemandedElts, unsigned Depth = 0);
53 const APInt &DemandedElts,
57 void computeKnownFPClass(Register R, const APInt &DemandedElts,
70 const APInt &DemandedElts,
73 unsigned computeNumSignBits(Register R, const APInt &DemandedElts,
79 KnownBits getKnownBits(Register R, const APInt &DemandedElts,
116 KnownFPClass computeKnownFPClass(Register R, const APInt &DemandedElts,
125 KnownFPClass computeKnownFPClass(Register R, const APInt &DemandedElts,
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DValueTracking.cpp120 const APInt &DemandedElts, in getShuffleDemandedElts() argument
123 assert(DemandedElts == APInt(1,1)); in getShuffleDemandedElts()
124 DemandedLHS = DemandedRHS = DemandedElts; in getShuffleDemandedElts()
131 DemandedElts, DemandedLHS, DemandedRHS); in getShuffleDemandedElts()
134 static void computeKnownBits(const Value *V, const APInt &DemandedElts,
144 APInt DemandedElts = in computeKnownBits() local
146 ::computeKnownBits(V, DemandedElts, Known, Q, Depth); in computeKnownBits()
166 KnownBits llvm::computeKnownBits(const Value *V, const APInt &DemandedElts, in computeKnownBits() argument
172 V, DemandedElts, in computeKnownBits()
276 static bool isKnownNonZero(const Value *V, const APInt &DemandedElts,
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H A DVectorUtils.cpp460 const APInt &DemandedElts, APInt &DemandedLHS, in getShuffleDemandedElts() argument
465 if (DemandedElts.isZero()) in getShuffleDemandedElts()
479 if (!DemandedElts[I] || (AllowUndefElts && (M < 0))) in getShuffleDemandedElts()
788 const APInt &DemandedElts, in getHorizDemandedEltsForFirstOperand() argument
793 int NumElts = DemandedElts.getBitWidth(); in getHorizDemandedEltsForFirstOperand()
802 if (!DemandedElts[Idx]) in getHorizDemandedEltsForFirstOperand()
1351 APInt DemandedElts = APInt::getAllOnes(VWidth); in possiblyDemandedEltsInMask() local
1355 DemandedElts.clearBit(i); in possiblyDemandedEltsInMask()
1356 return DemandedElts; in possiblyDemandedEltsInMask()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp2943 const APInt &DemandedElts, in MaskedValueIsZero() argument
2945 return Mask.isSubsetOf(computeKnownBits(V, DemandedElts, Depth).Zero); in MaskedValueIsZero()
2950 bool SelectionDAG::MaskedVectorIsZero(SDValue V, const APInt &DemandedElts, in MaskedVectorIsZero() argument
2952 return computeKnownBits(V, DemandedElts, Depth).isZero(); in MaskedVectorIsZero()
2962 const APInt &DemandedElts, in computeVectorKnownZeroElements() argument
2968 assert(DemandedElts.getBitWidth() == NumElts && "Unexpected demanded mask."); in computeVectorKnownZeroElements()
2972 if (!DemandedElts[EltIdx]) in computeVectorKnownZeroElements()
2986 bool SelectionDAG::isSplatValue(SDValue V, const APInt &DemandedElts, in isSplatValue() argument
2991 assert((!VT.isScalableVector() || DemandedElts.getBitWidth() == 1) && in isSplatValue()
2994 if (!DemandedElts) in isSplatValue()
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H A DTargetLowering.cpp538 const APInt &DemandedElts, in ShrinkDemandedConstant() argument
545 if (DemandedBits.isZero() || DemandedElts.isZero()) in ShrinkDemandedConstant()
549 if (targetShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in ShrinkDemandedConstant()
587 APInt DemandedElts = VT.isVector() in ShrinkDemandedConstant() local
590 return ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO); in ShrinkDemandedConstant()
663 const APInt &DemandedElts, in SimplifyDemandedBits() argument
671 SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO); in SimplifyDemandedBits()
689 APInt DemandedElts = VT.isFixedLengthVector() in SimplifyDemandedBits() local
692 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth, in SimplifyDemandedBits()
698 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, in SimplifyMultipleUseDemandedBits() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstCombineIntrinsic.cpp436 APInt DemandedElts = APInt::getAllOnes(VWidth); in trimTrailingZerosInVector() local
450 DemandedElts.clearBit(i); in trimTrailingZerosInVector()
453 return DemandedElts; in trimTrailingZerosInVector()
461 APInt DemandedElts = APInt::getAllOnes(VWidth); in defaultComponentBroadcast() local
479 DemandedElts.clearBit(I); in defaultComponentBroadcast()
482 return DemandedElts; in defaultComponentBroadcast()
487 APInt DemandedElts,
1618 APInt DemandedElts; in instCombineIntrinsic() local
1620 DemandedElts = defaultComponentBroadcast(II.getArgOperand(0)); in instCombineIntrinsic()
1622 DemandedElts = trimTrailingZerosInVector(IC, II.getArgOperand(0), &II); in instCombineIntrinsic()
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H A DAMDGPUISelLowering.h312 const APInt &DemandedElts,
316 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const APInt &DemandedElts,
322 const APInt &DemandedElts,
326 bool isKnownNeverNaNForTargetNode(SDValue Op, const APInt &DemandedElts,
H A DAMDGPUTargetTransformInfo.h224 const APInt &DemandedElts,
231 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h114 VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract,
125 return !DemandedElts[Idx] || isa<Constant>(VL[Idx]);
141 if (DemandedElts[Idx])
145 return Cost + BaseT::getScalarizationOverhead(InTy, DemandedElts, Insert,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1398 APInt DemandedElts, in SimplifyDemandedVectorElts() argument
1409 assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!"); in SimplifyDemandedVectorElts()
1417 if (DemandedElts.isZero()) { // If nothing is demanded, provide poison. in SimplifyDemandedVectorElts()
1427 if (DemandedElts.isAllOnes()) in SimplifyDemandedVectorElts()
1434 if (!DemandedElts[i]) { // If not demanded, set to poison. in SimplifyDemandedVectorElts()
1470 DemandedElts = EltMask; in SimplifyDemandedVectorElts()
1520 simplifyAndSetOp(I, i, DemandedElts, PoisonEltsOp); in SimplifyDemandedVectorElts()
1538 simplifyAndSetOp(I, 0, DemandedElts, PoisonElts2); in SimplifyDemandedVectorElts()
1545 APInt PreInsertDemandedElts = DemandedElts; in SimplifyDemandedVectorElts()
1566 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) { in SimplifyDemandedVectorElts()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp2158 APInt DemandedElts = APInt::getLowBitsSet(Width, DemandedWidth); in instCombineIntrinsic() local
2159 return IC.SimplifyDemandedVectorElts(Op, DemandedElts, UndefElts); in instCombineIntrinsic()
3117 APInt DemandedElts = DemandedMask.zextOrTrunc(ArgWidth); in simplifyDemandedUseBitsIntrinsic() local
3119 if (DemandedElts.isZero()) { in simplifyDemandedUseBitsIntrinsic()
3133 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
3147 if (!DemandedElts[0]) { in simplifyDemandedVectorEltsIntrinsic()
3153 DemandedElts = 1; in simplifyDemandedVectorEltsIntrinsic()
3154 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts); in simplifyDemandedVectorEltsIntrinsic()
3163 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts); in simplifyDemandedVectorEltsIntrinsic()
3166 if (!DemandedElts[0]) { in simplifyDemandedVectorEltsIntrinsic()
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H A DX86ISelLowering.h1290 const APInt &DemandedElts,
1297 const APInt &DemandedElts,
1303 const APInt &DemandedElts,
1308 const APInt &DemandedElts,
1315 const APInt &DemandedElts,
1322 const APInt &DemandedElts,
1328 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
1332 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
1336 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
1339 bool isSplatValueForTargetNode(SDValue Op, const APInt &DemandedElts,
H A DX86TargetTransformInfo.h172 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
207 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h2060 const APInt &DemandedElts,
2065 LLVM_ABI bool MaskedVectorIsZero(SDValue Op, const APInt &DemandedElts,
2075 const APInt &DemandedElts,
2090 LLVM_ABI KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts,
2189 LLVM_ABI unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
2204 const APInt &DemandedElts,
2217 const APInt &DemandedElts,
2228 bool isGuaranteedNotToBePoison(SDValue Op, const APInt &DemandedElts,
2230 return isGuaranteedNotToBeUndefOrPoison(Op, DemandedElts,
2243 LLVM_ABI bool canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
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H A DTargetLowering.h4122 const APInt &DemandedElts,
4134 const APInt &DemandedElts, in targetShrinkDemandedConstant() argument
4161 const APInt &DemandedElts, KnownBits &Known,
4180 const APInt &DemandedElts,
4187 const APInt &DemandedElts,
4200 const APInt &DemandedElts,
4225 bool SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedElts,
4242 const APInt &DemandedElts,
4252 const APInt &DemandedElts,
4259 const APInt &DemandedElts,
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/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DValueTracking.h77 LLVM_ABI KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
85 LLVM_ABI KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
245 const APInt &DemandedElts,
264 const Value *V, const APInt &DemandedElts, FastMathFlags FMF,
H A DVectorUtils.h219 const APInt &DemandedElts,
316 const APInt &DemandedElts,
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h144 const APInt &DemandedElts,
149 const APInt &DemandedElts,
153 const APInt &DemandedElts,
158 const APInt &DemandedElts,
164 const APInt &DemandedElts,
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h68 const APInt &DemandedElts,
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/InstCombine/
H A DInstCombiner.h352 IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
523 SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &UndefElts,
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h649 const APInt &DemandedElts,
655 const APInt &DemandedElts,
660 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
H A DSystemZTargetTransformInfo.h89 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h141 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
459 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h135 const APInt &DemandedElts,

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