Lines Matching refs:DemandedElts
515 const APInt &DemandedElts, in ShrinkDemandedConstant() argument
522 if (DemandedBits.isZero() || DemandedElts.isZero()) in ShrinkDemandedConstant()
526 if (targetShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in ShrinkDemandedConstant()
564 APInt DemandedElts = VT.isVector() in ShrinkDemandedConstant() local
567 return ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO); in ShrinkDemandedConstant()
636 const APInt &DemandedElts, in SimplifyDemandedBits() argument
644 SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO); in SimplifyDemandedBits()
662 APInt DemandedElts = VT.isFixedLengthVector() in SimplifyDemandedBits() local
665 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth, in SimplifyDemandedBits()
671 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, in SimplifyMultipleUseDemandedBits() argument
684 if (DemandedBits == 0 || DemandedElts == 0) in SimplifyMultipleUseDemandedBits()
688 unsigned NumElts = DemandedElts.getBitWidth(); in SimplifyMultipleUseDemandedBits()
706 Src, DemandedBits, DemandedElts, DAG, Depth + 1)) in SimplifyMultipleUseDemandedBits()
721 if (DemandedElts[j]) in SimplifyMultipleUseDemandedBits()
738 if (DemandedElts[i]) { in SimplifyMultipleUseDemandedBits()
753 if (DAG.isGuaranteedNotToBeUndefOrPoison(N0, DemandedElts, in SimplifyMultipleUseDemandedBits()
759 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
760 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
772 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
773 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
785 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
786 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
800 DAG.getValidMaximumShiftAmount(Op, DemandedElts, Depth + 1)) { in SimplifyMultipleUseDemandedBits()
804 DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
841 unsigned NumSignBits = DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
857 if (IsLE && DemandedElts == 1 && in SimplifyMultipleUseDemandedBits()
873 !DemandedElts[CIdx->getZExtValue()]) in SimplifyMultipleUseDemandedBits()
885 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in SimplifyMultipleUseDemandedBits()
900 if (M < 0 || !DemandedElts[i]) in SimplifyMultipleUseDemandedBits()
923 Op, DemandedBits, DemandedElts, DAG, Depth)) in SimplifyMultipleUseDemandedBits()
937 APInt DemandedElts = VT.isFixedLengthVector() in SimplifyMultipleUseDemandedBits() local
940 return SimplifyMultipleUseDemandedBits(Op, DemandedBits, DemandedElts, DAG, in SimplifyMultipleUseDemandedBits()
945 SDValue Op, const APInt &DemandedElts, SelectionDAG &DAG, in SimplifyMultipleUseDemandedVectorElts() argument
948 return SimplifyMultipleUseDemandedBits(Op, DemandedBits, DemandedElts, DAG, in SimplifyMultipleUseDemandedVectorElts()
958 const APInt &DemandedElts, unsigned Depth) { in combineShiftToAVG() argument
962 ConstantSDNode *N1C = isConstOrConstSplat(Op.getOperand(1), DemandedElts); in combineShiftToAVG()
981 if ((ConstOp = isConstOrConstSplat(Op2, DemandedElts)) && in combineShiftToAVG()
988 if ((ConstOp = isConstOrConstSplat(Op3, DemandedElts)) && in combineShiftToAVG()
1013 unsigned NumSignedA = DAG.ComputeNumSignBits(ExtOpA, DemandedElts, Depth); in combineShiftToAVG()
1014 unsigned NumSignedB = DAG.ComputeNumSignBits(ExtOpB, DemandedElts, Depth); in combineShiftToAVG()
1017 DAG.computeKnownBits(ExtOpA, DemandedElts, Depth).countMinLeadingZeros(); in combineShiftToAVG()
1019 DAG.computeKnownBits(ExtOpB, DemandedElts, Depth).countMinLeadingZeros(); in combineShiftToAVG()
1119 APInt DemandedElts = OriginalDemandedElts; in SimplifyDemandedBits() local
1152 DemandedElts = APInt::getAllOnes(NumElts); in SimplifyDemandedBits()
1167 if (!DemandedElts[0]) in SimplifyDemandedBits()
1179 if (DemandedElts == 1) in SimplifyDemandedBits()
1186 Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth); in SimplifyDemandedBits()
1203 Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth); in SimplifyDemandedBits()
1225 APInt DemandedVecElts(DemandedElts); in SimplifyDemandedBits()
1231 if (!DemandedElts[Idx]) in SimplifyDemandedBits()
1262 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in SimplifyDemandedBits()
1263 APInt DemandedSrcElts = DemandedElts; in SimplifyDemandedBits()
1307 APInt DemandedSrcElts = DemandedElts.zext(NumSrcElts).shl(Idx); in SimplifyDemandedBits()
1335 DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedBits()
1351 if (!getShuffleDemandedElts(NumElts, ShuffleMask, DemandedElts, DemandedLHS, in SimplifyDemandedBits()
1396 if (ConstantSDNode *RHSC = isConstOrConstSplat(Op1, DemandedElts)) { in SimplifyDemandedBits()
1398 KnownBits LHSKnown = TLO.DAG.computeKnownBits(Op0, DemandedElts, Depth); in SimplifyDemandedBits()
1407 DemandedElts, TLO)) in SimplifyDemandedBits()
1434 TLO.DAG.computeKnownBits(Op1, DemandedSub & DemandedElts, Depth + 1); in SimplifyDemandedBits()
1445 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedElts, Known, TLO, in SimplifyDemandedBits()
1448 if (SimplifyDemandedBits(Op0, ~Known.Zero & DemandedBits, DemandedElts, in SimplifyDemandedBits()
1462 if (ShrinkDemandedConstant(Op, ~Known2.Zero & DemandedBits, DemandedElts, in SimplifyDemandedBits()
1470 if (!DemandedBits.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
1472 Op0, DemandedBits, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1474 Op1, DemandedBits, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1490 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedElts, Known, TLO, in SimplifyDemandedBits()
1499 if (SimplifyDemandedBits(Op0, ~Known.One & DemandedBits, DemandedElts, in SimplifyDemandedBits()
1515 if (ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in SimplifyDemandedBits()
1522 if (!DemandedBits.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
1524 Op0, DemandedBits, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1526 Op1, DemandedBits, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1569 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedElts, Known, TLO, in SimplifyDemandedBits()
1572 if (SimplifyDemandedBits(Op0, DemandedBits, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
1592 ConstantSDNode *C = isConstOrConstSplat(Op1, DemandedElts); in SimplifyDemandedBits()
1617 isConstOrConstSplat(Op0.getOperand(1), DemandedElts)) { in SimplifyDemandedBits()
1643 if (ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in SimplifyDemandedBits()
1647 if (!DemandedBits.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
1649 Op0, DemandedBits, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1651 Op1, DemandedBits, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1664 if (SimplifyDemandedBits(Op.getOperand(2), DemandedBits, DemandedElts, in SimplifyDemandedBits()
1667 if (SimplifyDemandedBits(Op.getOperand(1), DemandedBits, DemandedElts, in SimplifyDemandedBits()
1672 if (ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in SimplifyDemandedBits()
1679 if (SimplifyDemandedBits(Op.getOperand(2), DemandedBits, DemandedElts, in SimplifyDemandedBits()
1682 if (SimplifyDemandedBits(Op.getOperand(1), DemandedBits, DemandedElts, in SimplifyDemandedBits()
1690 if (SimplifyDemandedBits(Op.getOperand(3), DemandedBits, DemandedElts, in SimplifyDemandedBits()
1693 if (SimplifyDemandedBits(Op.getOperand(2), DemandedBits, DemandedElts, in SimplifyDemandedBits()
1698 if (ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in SimplifyDemandedBits()
1738 TLO.DAG.getValidShiftAmount(Op, DemandedElts, Depth + 1)) { in SimplifyDemandedBits()
1750 TLO.DAG.getValidShiftAmount(Op0, DemandedElts, Depth + 2)) { in SimplifyDemandedBits()
1790 InnerOp, DemandedElts, Depth + 2)) { in SimplifyDemandedBits()
1808 if (SimplifyDemandedBits(Op0, InDemandedMask, DemandedElts, Known, TLO, in SimplifyDemandedBits()
1826 if (!InDemandedMask.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
1828 Op0, InDemandedMask, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
1899 if (SimplifyDemandedBits(Op0, DemandedFromOp, DemandedElts, Known, TLO, in SimplifyDemandedBits()
1918 TLO.DAG.getValidMaximumShiftAmount(Op, DemandedElts, Depth + 1)) { in SimplifyDemandedBits()
1921 TLO.DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1); in SimplifyDemandedBits()
1934 TLO.DAG.getValidShiftAmount(Op, DemandedElts, Depth + 1)) { in SimplifyDemandedBits()
1946 TLO.DAG.getValidShiftAmount(Op0, DemandedElts, Depth + 2)) { in SimplifyDemandedBits()
1990 if (SimplifyDemandedBits(Op0, InDemandedMask, DemandedElts, Known, TLO, in SimplifyDemandedBits()
1999 if (!InDemandedMask.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
2001 Op0, InDemandedMask, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2010 Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth); in SimplifyDemandedBits()
2015 DemandedElts, Depth + 1)) in SimplifyDemandedBits()
2028 if (TLO.DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1) >= in SimplifyDemandedBits()
2040 TLO.DAG.getValidShiftAmount(Op, DemandedElts, Depth + 1)) { in SimplifyDemandedBits()
2049 TLO.DAG.getValidShiftAmount(Op0, DemandedElts, Depth + 2)) { in SimplifyDemandedBits()
2067 TLO.DAG.ComputeNumSignBits(Op0.getOperand(0), DemandedElts); in SimplifyDemandedBits()
2086 if (SimplifyDemandedBits(Op0, InDemandedMask, DemandedElts, Known, TLO, in SimplifyDemandedBits()
2114 if (!InDemandedMask.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
2116 Op0, InDemandedMask, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2126 DemandedElts, Depth + 1)) in SimplifyDemandedBits()
2138 if (ConstantSDNode *SA = isConstOrConstSplat(Op2, DemandedElts)) { in SimplifyDemandedBits()
2144 if (SimplifyDemandedBits(IsFSHL ? Op0 : Op1, DemandedBits, DemandedElts, in SimplifyDemandedBits()
2154 if (SimplifyDemandedBits(Op0, Demanded0, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
2157 if (SimplifyDemandedBits(Op1, Demanded1, DemandedElts, Known, TLO, in SimplifyDemandedBits()
2169 !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
2171 Op0, Demanded0, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2173 Op1, Demanded1, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2187 if (SimplifyDemandedBits(Op2, DemandedAmtBits, DemandedElts, in SimplifyDemandedBits()
2200 if (BitWidth == TLO.DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1)) in SimplifyDemandedBits()
2203 if (ConstantSDNode *SA = isConstOrConstSplat(Op1, DemandedElts)) { in SimplifyDemandedBits()
2210 if (SimplifyDemandedBits(Op0, Demanded0, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
2234 if (SimplifyDemandedBits(Op1, DemandedAmtBits, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
2252 std::min(TLO.DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1), in SimplifyDemandedBits()
2253 TLO.DAG.ComputeNumSignBits(Op1, DemandedElts, Depth + 1)); in SimplifyDemandedBits()
2259 KnownBits Known0 = TLO.DAG.computeKnownBits(Op0, DemandedElts, Depth + 1); in SimplifyDemandedBits()
2260 KnownBits Known1 = TLO.DAG.computeKnownBits(Op1, DemandedElts, Depth + 1); in SimplifyDemandedBits()
2296 if (SimplifyDemandedBits(Src, DemandedSrcBits, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
2330 if (SimplifyDemandedBits(Src, DemandedSrcBits, DemandedElts, Known2, TLO, in SimplifyDemandedBits()
2345 Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth); in SimplifyDemandedBits()
2356 TLO.DAG.ComputeMaxSignificantBits(Op0, DemandedElts, Depth + 1); in SimplifyDemandedBits()
2380 if (SimplifyDemandedBits(Op0, InputDemandedBits, DemandedElts, Known, TLO, in SimplifyDemandedBits()
2434 if (IsLE && IsVecInReg && DemandedElts == 1 && in SimplifyDemandedBits()
2446 APInt InDemandedElts = DemandedElts.zext(InElts); in SimplifyDemandedBits()
2475 APInt InDemandedElts = DemandedElts.zext(InElts); in SimplifyDemandedBits()
2486 if (IsLE && IsVecInReg && DemandedElts == 1 && in SimplifyDemandedBits()
2540 if (IsLE && IsVecInReg && DemandedElts == 1 && in SimplifyDemandedBits()
2545 APInt InDemandedElts = DemandedElts.zext(InElts); in SimplifyDemandedBits()
2565 if (SimplifyDemandedBits(Src, TruncMask, DemandedElts, Known, TLO, in SimplifyDemandedBits()
2572 Src, TruncMask, DemandedElts, TLO.DAG, Depth + 1)) in SimplifyDemandedBits()
2601 TLO.DAG.getValidShiftAmount(Src, DemandedElts, Depth + 2); in SimplifyDemandedBits()
2724 if (DemandedElts[j]) in SimplifyDemandedBits()
2745 if (DemandedElts[i]) { in SimplifyDemandedBits()
2776 Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth); in SimplifyDemandedBits()
2787 ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(1), DemandedElts); in SimplifyDemandedBits()
2818 if (SimplifyDemandedBits(Op1, LoMask, DemandedElts, KnownOp1, TLO, in SimplifyDemandedBits()
2821 DemandedElts, KnownOp0, TLO, Depth + 1) || in SimplifyDemandedBits()
2840 if (!LoMask.isAllOnes() || !DemandedElts.isAllOnes()) { in SimplifyDemandedBits()
2842 Op0, LoMask, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2844 Op1, LoMask, DemandedElts, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2934 if (SimplifyDemandedBitsForTargetNode(Op, DemandedBits, DemandedElts, in SimplifyDemandedBits()
2941 Known = TLO.DAG.computeKnownBits(Op, DemandedElts, Depth); in SimplifyDemandedBits()
2976 const APInt &DemandedElts, in SimplifyDemandedVectorElts() argument
2984 SimplifyDemandedVectorElts(Op, DemandedElts, KnownUndef, KnownZero, TLO); in SimplifyDemandedVectorElts()
3047 APInt DemandedElts = OriginalDemandedElts; in SimplifyDemandedVectorElts() local
3048 unsigned NumElts = DemandedElts.getBitWidth(); in SimplifyDemandedVectorElts()
3072 DemandedElts.setAllBits(); in SimplifyDemandedVectorElts()
3075 if (DemandedElts == 0) { in SimplifyDemandedVectorElts()
3091 SDValue NewOp0 = SimplifyMultipleUseDemandedVectorElts(Op0, DemandedElts, in SimplifyDemandedVectorElts()
3093 SDValue NewOp1 = SimplifyMultipleUseDemandedVectorElts(Op1, DemandedElts, in SimplifyDemandedVectorElts()
3106 if (!DemandedElts[0]) { in SimplifyDemandedVectorElts()
3146 return SimplifyDemandedVectorElts(Src, DemandedElts, KnownUndef, in SimplifyDemandedVectorElts()
3155 SrcDemandedElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts); in SimplifyDemandedVectorElts()
3167 if (DemandedElts[i]) { in SimplifyDemandedVectorElts()
3187 if (DemandedElts[Elt]) in SimplifyDemandedVectorElts()
3210 SrcDemandedElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts); in SimplifyDemandedVectorElts()
3218 if (DemandedElts[i]) { in SimplifyDemandedVectorElts()
3230 if (TLO.DAG.isGuaranteedNotToBeUndefOrPoison(N0, DemandedElts, in SimplifyDemandedVectorElts()
3236 if (N0.getOpcode() == ISD::SCALAR_TO_VECTOR && DemandedElts == 1) in SimplifyDemandedVectorElts()
3244 if (!DemandedElts.isAllOnes()) { in SimplifyDemandedVectorElts()
3251 if (!DemandedElts[i] && !Ops[i].isUndef()) { in SimplifyDemandedVectorElts()
3278 APInt SubElts = DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedVectorElts()
3288 if (!DemandedElts.isAllOnes()) { in SimplifyDemandedVectorElts()
3293 APInt SubElts = DemandedElts.extractBits(NumSubElts, i * NumSubElts); in SimplifyDemandedVectorElts()
3314 APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx); in SimplifyDemandedVectorElts()
3315 APInt DemandedSrcElts = DemandedElts; in SimplifyDemandedVectorElts()
3358 APInt DemandedSrcElts = DemandedElts.zext(NumSrcElts).shl(Idx); in SimplifyDemandedVectorElts()
3368 if (!DemandedElts.isAllOnes()) { in SimplifyDemandedVectorElts()
3388 if (!DemandedElts[Idx]) in SimplifyDemandedVectorElts()
3391 APInt DemandedVecElts(DemandedElts); in SimplifyDemandedVectorElts()
3404 if (SimplifyDemandedVectorElts(Vec, DemandedElts, VecUndef, VecZero, TLO, in SimplifyDemandedVectorElts()
3418 if (SimplifyDemandedVectorElts(Sel, DemandedElts, UndefSel, ZeroSel, TLO, in SimplifyDemandedVectorElts()
3423 APInt DemandedLHS(DemandedElts); in SimplifyDemandedVectorElts()
3424 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts()
3439 APInt DemandedSel = DemandedElts & ~KnownZero; in SimplifyDemandedVectorElts()
3440 if (DemandedSel != DemandedElts) in SimplifyDemandedVectorElts()
3457 if (M < 0 || !DemandedElts[i]) in SimplifyDemandedVectorElts()
3484 if (!DemandedElts[i] || (M < (int)NumElts && UndefLHS[M]) || in SimplifyDemandedVectorElts()
3527 APInt DemandedSrcElts = DemandedElts.zext(NumSrcElts); in SimplifyDemandedVectorElts()
3543 if (DemandedElts.isSubsetOf(KnownUndef)) in SimplifyDemandedVectorElts()
3576 if (SimplifyDemandedVectorElts(Op0, DemandedElts, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3598 if (SimplifyDemandedVectorElts(Op1, DemandedElts, UndefRHS, ZeroRHS, TLO, in SimplifyDemandedVectorElts()
3602 if (SimplifyDemandedVectorElts(Op0, DemandedElts, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3611 if (!DemandedElts.isAllOnes()) in SimplifyDemandedVectorElts()
3625 if (SimplifyDemandedVectorElts(Op1, DemandedElts, UndefRHS, ZeroRHS, TLO, in SimplifyDemandedVectorElts()
3629 if (SimplifyDemandedVectorElts(Op0, DemandedElts, UndefLHS, ZeroLHS, TLO, in SimplifyDemandedVectorElts()
3638 if (!DemandedElts.isAllOnes()) in SimplifyDemandedVectorElts()
3651 if (SimplifyDemandedVectorElts(Op1, DemandedElts, SrcUndef, SrcZero, TLO, in SimplifyDemandedVectorElts()
3656 APInt DemandedElts0 = DemandedElts & ~SrcZero; in SimplifyDemandedVectorElts()
3667 if (DemandedElts.isSubsetOf(SrcZero | KnownZero | SrcUndef | KnownUndef)) in SimplifyDemandedVectorElts()
3679 if (!DemandedElts.isAllOnes()) in SimplifyDemandedVectorElts()
3687 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef, in SimplifyDemandedVectorElts()
3693 if (DemandedElts.isSubsetOf(KnownUndef)) in SimplifyDemandedVectorElts()
3700 if (SimplifyDemandedVectorEltsForTargetNode(Op, DemandedElts, KnownUndef, in SimplifyDemandedVectorElts()
3717 if (DemandedElts.isSubsetOf(KnownUndef)) in SimplifyDemandedVectorElts()
3727 const APInt &DemandedElts, in computeKnownBitsForTargetNode() argument
3741 const APInt &DemandedElts, const MachineRegisterInfo &MRI, in computeKnownBitsForTargetInstr() argument
3774 GISelKnownBits &Analysis, Register R, const APInt &DemandedElts, in computeNumSignBitsForTargetInstr() argument
3780 SDValue Op, const APInt &DemandedElts, APInt &KnownUndef, APInt &KnownZero, in SimplifyDemandedVectorEltsForTargetNode() argument
3792 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, in SimplifyDemandedBitsForTargetNode() argument
3800 computeKnownBitsForTargetNode(Op, Known, DemandedElts, TLO.DAG, Depth); in SimplifyDemandedBitsForTargetNode()
3805 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, in SimplifyMultipleUseDemandedBitsForTargetNode() argument
3839 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, in isGuaranteedNotToBeUndefOrPoisonForTargetNode() argument
3851 return !canCreateUndefOrPoisonForTargetNode(Op, DemandedElts, DAG, PoisonOnly, in isGuaranteedNotToBeUndefOrPoisonForTargetNode()
3860 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, in canCreateUndefOrPoisonForTargetNode() argument
3886 const APInt &DemandedElts, in isSplatValueForTargetNode() argument