Searched refs:BaseDef (Results 1 – 5 of 5) sorted by relevance
478 const Record *BaseDef = in addEntryWithFlags() local481 BaseDef ? Target.getInstruction(BaseDef).isMoveReg : RegInst->isMoveReg; in addEntryWithFlags()484 if (IsMoveReg && (BaseDef || Result.FoldStore)) in addEntryWithFlags()
964 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg); in computeDelta() local965 if (BaseDef && BaseDef->isPHI()) { in computeDelta()966 BaseReg = getLoopPhiReg(*BaseDef, MI.getParent()); in computeDelta()967 BaseDef = MRI.getVRegDef(BaseReg); in computeDelta()969 if (!BaseDef) in computeDelta()973 if (!TII->getIncrementValue(*BaseDef, D) && D >= 0) in computeDelta()
2558 D->forallBases([&](const CXXRecordDecl *BaseDef) { in DiagnoseNonStandardLayoutReason() argument2559 if (BaseDef->hasDirectFields()) { in DiagnoseNonStandardLayoutReason()2560 Indirect = BaseDef; in DiagnoseNonStandardLayoutReason()
5818 std::optional<DefinitionAndSourceRegister> BaseDef = in isFlatScratchBaseLegalSVImm() local5828 if (isNoUnsignedWrap(BaseDef->MI) && in isFlatScratchBaseLegalSVImm()5834 Register LHS = BaseDef->MI->getOperand(1).getReg(); in isFlatScratchBaseLegalSVImm()5835 Register RHS = BaseDef->MI->getOperand(2).getReg(); in isFlatScratchBaseLegalSVImm()
1349 MachineInstr *BaseDef = getDefIgnoringCopies(Base, MRI); in findPreIndexCandidate() local1350 if (BaseDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) in findPreIndexCandidate()