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Searched refs:ANDNP (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1328 case X86ISD::FANDN: Opc = X86ISD::ANDNP; break; in PreprocessISelDAG()
4737 Opc == X86ISD::ANDNP) in tryVPTERNLOG()
4785 case X86ISD::ANDNP: Imm = ~(TernlogMagicB) & TernlogMagicC; break; in tryVPTERNLOG()
4790 case X86ISD::ANDNP: in tryVPTERNLOG()
5116 N1.getOpcode() != X86ISD::ANDNP || in tryMatchBitSelect()
5483 case X86ISD::ANDNP: in Select()
H A DX86ISelLowering.h217 ANDNP, enumerator
H A DX86ISelLowering.cpp2832 return ISD::isBitwiseLogicOp(Opcode) || X86ISD::ANDNP == Opcode; in isLogicOp()
2890 case X86ISD::ANDNP: in isTargetShuffleVariableMask()
4789 RHS = DAG.getNode(X86ISD::ANDNP, DL, VT, Mask, RHS); in getBitSelect()
6132 case X86ISD::ANDNP: { in getFauxShuffleMask()
6138 bool IsAndN = (X86ISD::ANDNP == Opcode); in getFauxShuffleMask()
29571 SDValue BHi = DAG.getNode(X86ISD::ANDNP, dl, VT, Mask, B); in LowerMUL()
34985 NODE_NAME_CASE(ANDNP) in getTargetNodeName()
35458 case X86ISD::ANDNP: in isBinOp()
38429 (Opcode == ISD::OR || Opcode == ISD::XOR || Opcode == X86ISD::ANDNP) && in targetShrinkDemandedConstant()
38737 case X86ISD::ANDNP: { in computeKnownBitsForTargetNode()
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H A DX86InstrFragmentsSIMD.td95 def X86andnp : SDNode<"X86ISD::ANDNP",