| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6735-infracfg.c | 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | clk-mt6735-topckgen.c | 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | clk-mt6735-pericfg.c | 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | clk-mt6735-apmixedsys.c | 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | Kconfig | diff 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| H A D | Makefile | diff 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
| /linux/ |
| H A D | MAINTAINERS | diff 43c04ed79189214e478c4c0f82319e94ba30c756 Thu Oct 17 09:17:06 CEST 2024 Yassine Oudjana <y.oudjana@protonmail.com> clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|