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Searched +full:vga +full:- +full:dvi +full:- +full:encoder (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/display/bridge/
H A Dchrontel,ch7033.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Chrontel CH7033 Video Encoder
11 - Lubomir Rintel <lkundrak@v3.sk>
33 DVI port, should be connected to a node compatible with the
34 dvi-connector binding.
37 - port@0
38 - port@1
41 - compatible
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/linux/include/drm/
H A Ddrm_encoder.h36 * struct drm_encoder_funcs - encoder controls
44 * Reset encoder hardware and software state to off. This function isn't
48 void (*reset)(struct drm_encoder *encoder);
53 * Clean up encoder resources. This is only called at driver unload time
54 * through drm_mode_config_cleanup() since an encoder cannot be
57 void (*destroy)(struct drm_encoder *encoder);
63 * interfaces attached to the encoder.
72 int (*late_register)(struct drm_encoder *encoder);
78 * userspace interfaces attached to the encoder from
83 void (*early_unregister)(struct drm_encoder *encoder);
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_combios.c3 * Copyright 2007-8 Advanced Micro Devices, Inc.
133 struct radeon_device *rdev = dev->dev_private; in combios_get_table_offset()
137 if (!rdev->bios) in combios_get_table_offset()
362 size = RBIOS8(rdev->bios_header_start + 0x6); in combios_get_table_offset()
365 offset = RBIOS16(rdev->bios_header_start + check_offset); in combios_get_table_offset()
379 raw = rdev->bios + edid_info; in radeon_combios_check_hardcoded_edid()
388 rdev->mode_info.bios_hardcoded_edid = edid; in radeon_combios_check_hardcoded_edid()
396 return drm_edid_duplicate(drm_edid_raw(rdev->mode_info.bios_hardcoded_edid)); in radeon_bios_get_hardcoded_edid()
447 if (rdev->family == CHIP_RS300 || in combios_setup_i2c_bus()
448 rdev->family == CHIP_RS400 || in combios_setup_i2c_bus()
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H A Dradeon_atombios.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
52 if ((rdev->family == CHIP_R420) || in radeon_lookup_i2c_gpio_quirks()
53 (rdev->family == CHIP_R423) || in radeon_lookup_i2c_gpio_quirks()
54 (rdev->family == CHIP_RV410)) { in radeon_lookup_i2c_gpio_quirks()
55 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) || in radeon_lookup_i2c_gpio_quirks()
56 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) || in radeon_lookup_i2c_gpio_quirks()
57 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) { in radeon_lookup_i2c_gpio_quirks()
58 gpio->ucClkMaskShift = 0x19; in radeon_lookup_i2c_gpio_quirks()
59 gpio->ucDataMaskShift = 0x18; in radeon_lookup_i2c_gpio_quirks()
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H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
678 UCHAR ucAction; // 0: turn off encoder
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/linux/drivers/gpu/drm/amd/include/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
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H A Datomfirmware.h6 * Description header file of general definitions for OS and pre-OS video drivers
31 * If a change in VBIOS/Driver/Tool's interface is only needed for pre-SoC15 products, then the chan…
81 // define ASIC internal encoder id ( bit vector ), used for CRTC_SourceSel
115 ATOM_SCALER_DISABLE =0, /*scaler bypass mode, auto-center & no replication*/
116 ATOM_SCALER_CENTER =1, //For Fudo, it's bypass and auto-center & auto replication
203 #define BIOS_VERSION_PREFIX "ATOMBIOSBK-AMD"
246 …tom_string_def atom_bios_string; //Signature to distinguish between Atombios and non-atombios,
605 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
606 uint32_t usb_pwrlimit_mw; // power limit when USB is enable in unit of m-watt
637 uint32_t maco_pwrlimit_mw; // bomaco mode power limit in unit of m-watt
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/linux/drivers/gpu/drm/display/
H A Ddrm_bridge_connector.c1 // SPDX-License-Identifier: GPL-2.0+
49 * operation flags (&drm_bridge->ops) and bridge output type
50 * (&drm_bridge->type), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach
55 * struct drm_bridge_connector - A connector backed by a chain of bridges
63 * @encoder:
65 * The encoder at the start of the bridges chain.
67 struct drm_encoder *encoder; member
79 * hot-plug detection notification, if any (see &DRM_BRIDGE_OP_HPD).
130 /* -----------------------------------------------------------------------------
131 * Bridge Connector Hot-Plug Handling
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H A Ddrm_dp_helper.c78 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
232 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
233 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
244 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
245 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
257 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
258 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
280 * - Clock recovery vs. channel equalization
281 * - DPRX vs. LTTPR
282 * - 128b/132b vs. 8b/10b
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/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.c2 * Copyright 2005-2006 Erik Waling
4 * Copyright 2007-2009 Stuart Bennett
33 #include <linux/io-mapping.h>
43 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
69 if (bios->major_version < 5) /* pre BIT */ in clkcmptable()
75 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); in clkcmptable()
77 if (bios->major_version < 5) { in clkcmptable()
78 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; in clkcmptable()
79 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); in clkcmptable()
81 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]); in clkcmptable()
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/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c57 link->ctx->logger
109 return (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_VGA_CONVERTER) && in is_dp_active_dongle()
110 (link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_CONVERTER); in is_dp_active_dongle()
115 return link->dpcd_caps.is_branch_dev; in is_dp_branch_device()
133 return -1; in translate_dpcd_max_bpc()
166 return DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE * (lttpr_count - 1); in dp_get_closest_lttpr_offset()
195 link_rate = LINK_RATE_LOW; // Rate_1 (RBR) - 1.62 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
198 link_rate = LINK_RATE_RATE_2; // Rate_2 - 2.16 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
201 link_rate = LINK_RATE_RATE_3; // Rate_3 - 2.43 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
204 link_rate = LINK_RATE_HIGH; // Rate_4 (HBR) - 2.70 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
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/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
48 #define CRTC_REG(reg) (reg + tg110->offsets.crtc)
49 #define DCP_REG(reg) (reg + tg110->offsets.dcp)
69 if (timing->flags.INTERLACE == 1) { in dce110_timing_generator_apply_front_porch_workaround()
70 if (timing->v_front_porch < 2) in dce110_timing_generator_apply_front_porch_workaround()
71 timing->v_front_porch = 2; in dce110_timing_generator_apply_front_porch_workaround()
73 if (timing->v_front_porch < 1) in dce110_timing_generator_apply_front_porch_workaround()
74 timing->v_front_porch = 1; in dce110_timing_generator_apply_front_porch_workaround()
100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank()
113 regval = dm_read_reg(tg->ctx, address); in dce110_timing_generator_set_early_control()
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