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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8196-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
14 The clock architecture in MediaTek SoCs is structured like below:
15 PLLs -->
16 dividers -->
18 -->
[all …]
H A Dmediatek,mt8196-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
14 The clock architecture in MediaTek SoCs is structured like below:
15 PLLs -->
16 dividers -->
18 -->
[all …]
H A Dmediatek,mt8192-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8192-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Jie Chen <chun-jie.chen@mediatek.com>
14 like reset and bus protection on MT8192.
19 - enum:
20 - mediatek,mt8192-topckgen
21 - mediatek,mt8192-infracfg
22 - mediatek,mt8192-pericfg
[all …]
H A Dmediatek,mt8195-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8195-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Jie Chen <chun-jie.chen@mediatek.com>
13 The clock architecture in Mediatek like below
14 PLLs -->
15 dividers -->
17 -->
27 - enum:
[all …]
H A Dmediatek,mt8186-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8186-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Jie Chen <chun-jie.chen@mediatek.com>
13 The clock architecture in MediaTek like below
14 PLLs -->
15 dividers -->
17 -->
29 - enum:
[all …]
H A Dmediatek,mt8188-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8188-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Garmin Chang <garmin.chang@mediatek.com>
13 The clock architecture in MediaTek like below
14 PLLs -->
15 dividers -->
17 -->
29 - enum:
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Datmel-smc.txt5 devices like FPGAs).
8 - compatible: Should be one of the following
9 "atmel,at91sam9260-smc", "syscon"
10 "atmel,sama5d3-smc", "syscon"
11 "atmel,sama5d2-smc", "syscon"
12 "microchip,sam9x60-smc", "syscon"
13 "microchip,sam9x7-smc", "atmel,at91sam9260-smc", "syscon"
14 - reg: Contains offset/length value of the SMC memory
20 compatible = "atmel,sama5d3-smc", "syscon";
H A Dmfd.txt1 Multi-Function Devices (MFD)
4 more than one non-unique yet varying hardware functionality.
8 - A mixed signal ASIC on an external bus, sometimes a PMIC (Power Management
10 silicon) that handles analog drivers for things like audio amplifiers, LED
11 drivers, level shifters, PHY (physical interfaces to things like USB or
14 - A range of memory registers containing "miscellaneous system registers" also
15 known as a system controller "syscon" or any other memory range containing a
20 - compatible : "simple-mfd" - this signifies that the operating system
23 Similarly to how "simple-bus" indicates when to see subnodes as children for
24 a simple memory-mapped bus.
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
[all …]
H A Dsamsung,usb3-drd-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy.
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-hns-dsaf.txt4 - compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2".
5 "hisilicon,hns-dsaf-v1" is for hip05.
6 "hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612.
7 - mode: dsa fabric mode string. only support one of dsaf modes like these:
8 "2port-64vf",
9 "6port-16rss",
10 "6port-16vf",
11 "single-port".
12 - interrupts: should contain the DSA Fabric and rcb interrupt.
13 - reg: specifies base physical address(es) and size of the device registers.
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,keystone-rproc.txt5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
[all …]
/linux/drivers/phy/intel/
H A Dphy-intel-lgm-emmc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/syscon.h>
64 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
67 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in intel_emmc_phy_power()
75 rate = clk_get_rate(priv->emmcclk); in intel_emmc_phy_power()
78 dev_warn(&phy->dev, "Unsupported rate: %lu\n", rate); in intel_emmc_phy_power()
88 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
91 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in intel_emmc_phy_power()
102 ret = regmap_read_poll_timeout(priv->syscfg, EMMC_PHYSTAT_REG, in intel_emmc_phy_power()
106 dev_err(&phy->dev, "caldone failed, ret=%d\n", ret); in intel_emmc_phy_power()
[all …]
H A Dphy-intel-keembay-emmc.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/mfd/syscon.h>
66 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
69 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in keembay_emmc_phy_power()
73 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK, in keembay_emmc_phy_power()
76 dev_err(&phy->dev, "turn off the dll failed: %d\n", ret); in keembay_emmc_phy_power()
84 mhz = DIV_ROUND_CLOSEST(clk_get_rate(priv->emmcclk), 1000000); in keembay_emmc_phy_power()
100 dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz); in keembay_emmc_phy_power()
109 ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK, in keembay_emmc_phy_power()
112 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in keembay_emmc_phy_power()
[all …]
/linux/Documentation/devicetree/bindings/arm/
H A Darm,versatile-sysreg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
14 platform functions like board detection and identification, software
20 - const: arm,versatile-sysreg
21 - const: syscon
22 - const: simple-mfd
31 - compatible
[all …]
/linux/arch/arm/mach-omap1/
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/dma-map-ops.h>
15 #include <linux/soc/ti/omap1-io.h>
24 /* These routines should handle the standard chip-specific modes
27 * Some board-*.c files will need to set up additional mux options,
28 * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
32 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
33 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
34 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
35 * - 1510 Innovator UDC with bundled usb0 cable
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dsocionext,uniphier-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/socionext,uniphier-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
17 $ref: thermal-sensor.yaml#
22 - socionext,uniphier-pxs2-thermal
23 - socionext,uniphier-ld20-thermal
24 - socionext,uniphier-pxs3-thermal
25 - socionext,uniphier-nx1-thermal
[all …]
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/mfd/syscon.h>
12 #include "pinctrl-aspeed.h"
18 return pdata->pinmux.ngroups; in aspeed_pinctrl_get_groups_count()
26 return pdata->pinmux.groups[group].name; in aspeed_pinctrl_get_group_name()
35 *pins = &pdata->pinmux.groups[group].pins[0]; in aspeed_pinctrl_get_group_pins()
36 *npins = pdata->pinmux.groups[group].npins; in aspeed_pinctrl_get_group_pins()
44 seq_printf(s, " %s", dev_name(pctldev->dev)); in aspeed_pinctrl_pin_dbg_show()
51 return pdata->pinmux.nfunctions; in aspeed_pinmux_get_fn_count()
59 return pdata->pinmux.functions[function].name; in aspeed_pinmux_get_fn_name()
[all …]
/linux/arch/arm/boot/dts/arm/
H A Darm-realview-pb1176.dts23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
28 #address-cells = <1>;
29 #size-cells = <1>;
31 compatible = "arm,realview-pb1176";
50 vmmc: regulator-vmmc {
51 compatible = "regulator-fixed";
52 regulator-name = "vmmc";
53 regulator-min-microvolt = <3300000>;
[all …]
/linux/drivers/clocksource/
H A Dtimer-atmel-st.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-at91/at91rm9200_time.c
15 #include <linux/mfd/syscon.h>
16 #include <linux/mfd/syscon/atmel-st.h>
71 while (((crtr - last_crtr) & AT91_ST_CRTV) >= timer_latch) { in at91rm9200_timer_interrupt()
147 * time (delta) in our calling convention. Like all clockevents in clkevt32k_next_event()
204 return -EINVAL; in atmel_st_timer_init()
231 return -EINVAL; in atmel_st_timer_init()
249 TIMER_OF_DECLARE(atmel_st_timer, "atmel,at91rm9200-st",
/linux/drivers/phy/amlogic/
H A Dphy-meson8-hdmi-tx.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/mfd/syscon.h>
44 return clk_prepare_enable(priv->tmds_clk); in phy_meson8_hdmi_tx_init()
51 clk_disable_unprepare(priv->tmds_clk); in phy_meson8_hdmi_tx_exit()
62 if (clk_get_rate(priv->tmds_clk) >= 2970UL * 1000 * 1000) in phy_meson8_hdmi_tx_power_on()
67 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, in phy_meson8_hdmi_tx_power_on()
71 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, 0x0); in phy_meson8_hdmi_tx_power_on()
73 /* Reset three times, just like the vendor driver does */ in phy_meson8_hdmi_tx_power_on()
75 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, in phy_meson8_hdmi_tx_power_on()
80 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, in phy_meson8_hdmi_tx_power_on()
[all …]
/linux/drivers/phy/st/
H A Dphy-stih407-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/mfd/syscon.h>
44 reset_control_deassert(phy_dev->rstc); in stih407_usb2_pico_ctrl()
46 return regmap_update_bits(phy_dev->regmap, phy_dev->ctrl, in stih407_usb2_pico_ctrl()
58 ret = regmap_update_bits(phy_dev->regmap, in stih407_usb2_init_port()
59 phy_dev->param, in stih407_usb2_init_port()
65 return reset_control_deassert(phy_dev->rstport); in stih407_usb2_init_port()
77 * reset (like here) or global reset should be equivalent. in stih407_usb2_exit_port()
79 return reset_control_assert(phy_dev->rstport); in stih407_usb2_exit_port()
91 struct device *dev = &pdev->dev; in stih407_usb2_picophy_probe()
[all …]
/linux/drivers/remoteproc/
H A Domap_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/
8 * Ohad Ben-Cohen <ohad@wizery.com>
12 * Suman Anna <s-anna@ti.com>
13 * Hari Kanigeri <h-kanigeri2@ti.com>
27 #include <linux/dma-mapping.h>
31 #include <linux/omap-iommu.h>
32 #include <linux/omap-mailbox.h>
34 #include <linux/mfd/syscon.h>
36 #include <clocksource/timer-ti-dm.h>
[all …]
/linux/drivers/spi/
H A Dspi-ti-qspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
15 #include <linux/dma-mapping.h>
17 #include <linux/omap-dma.h>
26 #include <linux/mfd/syscon.h>
31 #include <linux/spi/spi-mem.h>
87 #define QSPI_WLEN(n) ((n - 1) << 19)
94 #define QSPI_FLEN(n) ((n - 1) << 0)
129 return readl(qspi->base + reg); in ti_qspi_read()
135 writel(val, qspi->base + reg); in ti_qspi_write()
[all …]
/linux/arch/m68k/bvme6000/
H A Dconfig.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 #include <asm/bootinfo-vme.h>
46 if (be16_to_cpu(bi->tag) == BI_VME_TYPE) in bvme6000_parse_bootinfo()
62 pit->pcddr |= 0x10; /* WDOG enable */ in bvme6000_reset()
112 pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */ in config_bvme6000()
113 pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */ in config_bvme6000()
114 pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */ in config_bvme6000()
115 pit->padr = 0x00; /* Just to be tidy! */ in config_bvme6000()
116 pit->paddr = 0x00; /* All inputs for now (safest) */ in config_bvme6000()
117 pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */ in config_bvme6000()
[all …]

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