Searched +full:stratix10 +full:- +full:soc +full:- +full:fpga +full:- +full:mgr (Results 1 – 5 of 5) sorted by relevance
| /linux/Documentation/devicetree/bindings/fpga/ |
| H A D | intel,stratix10-soc-fpga-mgr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Stratix10 SoC FPGA Manager
10 - Mahesh Rao <mahesh.rao@altera.com>
11 - Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
12 - Niravkumar L Rabara <nirav.rabara@altera.com>
15 The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard
16 processor system (HPS) and a Secure Device Manager (SDM). The Stratix10
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| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | intel,stratix10-svc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Service Layer Driver for Stratix10 SoC
10 - Dinh Nguyen <dinguyen@kernel.org>
11 - Mahesh Rao <mahesh.rao@altera.com>
14 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
15 processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
18 configuration data from that location and perform the FPGA configuration.
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| /linux/arch/arm64/boot/dts/altera/ |
| H A D | socfpga_stratix10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
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| /linux/arch/arm64/boot/dts/intel/ |
| H A D | socfpga_agilex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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