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Searched full:spio (Results 1 – 3 of 3) sorted by relevance

/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019-ap.dk07.1-c1.dts35 spio-cs-pins {
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_reg.h1683 these bits is written as a '1'; the corresponding SPIO bit will turn off
1710 corresponding SPIO input (reset value 0). [15-12] OLD_VALUE [11-8] port1;
1839 /* [RW 32] SPIO. [31-24] FLOAT When any of these bits is written as a '1';
1840 the corresponding SPIO bit will turn off it's drivers and become an
1841 input. This is the reset state of all SPIO pins. The read value of these
1844 is written as a '1'; the corresponding SPIO bit will drive low. The read
1847 these bits is written as a '1'; the corresponding SPIO bit will drive
1851 each of the eight SPIO pins. This is the result value of the pin; not the
1869 /* [RW 32] SPIO INT. [31-24] OLD_CLR Writing a '1' to these bit clears the
1871 interrupt on the falling edge of corresponding SPIO input (reset value
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H A Dbnx2x_main.c2258 static int bnx2x_set_spio(struct bnx2x *bp, int spio, u32 mode) in bnx2x_set_spio() argument
2263 if ((spio != MISC_SPIO_SPIO4) && (spio != MISC_SPIO_SPIO5)) { in bnx2x_set_spio()
2264 BNX2X_ERR("Invalid SPIO 0x%x\n", spio); in bnx2x_set_spio()
2269 /* read SPIO and mask except the float bits */ in bnx2x_set_spio()
2274 DP(NETIF_MSG_HW, "Set SPIO 0x%x -> output low\n", spio); in bnx2x_set_spio()
2276 spio_reg &= ~(spio << MISC_SPIO_FLOAT_POS); in bnx2x_set_spio()
2277 spio_reg |= (spio << MISC_SPIO_CLR_POS); in bnx2x_set_spio()
2281 DP(NETIF_MSG_HW, "Set SPIO 0x%x -> output high\n", spio); in bnx2x_set_spio()
2283 spio_reg &= ~(spio << MISC_SPIO_FLOAT_POS); in bnx2x_set_spio()
2284 spio_reg |= (spio << MISC_SPIO_SET_POS); in bnx2x_set_spio()
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