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/linux/Documentation/devicetree/bindings/iio/light/
H A Dti,opt4001.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Windfeldt-Prytz <stefan.windfeldt-prytz@axis.com>
15 Picostar is a 4 pinned SMT and sot-5x3 is a 8 pinned SOT.
21 - ti,opt4001-picostar
22 - ti,opt4001-sot-5x3
30 vdd-supply:
34 - compatible
35 - reg
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/linux/drivers/iio/light/
H A Dopt4001.c1 // SPDX-License-Identifier: GPL-2.0
39 #define OPT4001_CTRL_OPER_MODE_MASK GENMASK(5, 4)
51 #define OPT4001_CTRL_OPER_MODE_CONTINUOUS 0x3
57 #define OPT4001_CTRL_CONVERSION_3_4MS 0x3
93 .name = "opt4001-sot-5x3"
99 .name = "opt4001-picostar"
145 return -EINVAL; in opt4001_als_time_to_index()
166 struct device *dev = &chip->client->dev; in opt4001_read_lux_value()
178 ret = regmap_read(chip->regmap, OPT4001_LIGHT1_MSB, &light1); in opt4001_read_lux_value()
184 ret = regmap_read(chip->regmap, OPT4001_LIGHT1_LSB, &light2); in opt4001_read_lux_value()
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/linux/drivers/gpu/drm/tegra/
H A Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
201 struct drm_info_node *node = s->private; in tegra_dsi_show_regs()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs()
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/linux/drivers/media/platform/nxp/
H A Dimx-mipi-csis.c1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung CSIS MIPI CSI-2 receiver driver.
5 * The Samsung CSIS IP is a MIPI CSI-2 receiver found in various NXP i.MX7 and
10 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. All Rights Reserved.
11 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
31 #include <media/v4l2-common.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-mc.h>
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
102 * t4_read_indirect - read indirectly addressed registers
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