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Searched +full:socfpga +full:- +full:a10 +full:- +full:ecc +full:- +full:manager (Results 1 – 6 of 6) sorted by relevance

/linux/arch/arm/mach-socfpga/
H A Dl2_cache.c1 // SPDX-License-Identifier: GPL-2.0-only
11 /* A10 System Manager L2 ECC Control register */
15 /* A10 System Manager Global IRQ Mask register */
19 /* A10 System Manager L2 ECC IRQ Clear register */
28 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-l2-ecc"); in socfpga_init_l2_ecc()
30 pr_err("Unable to find socfpga-l2-ecc in dtb\n"); in socfpga_init_l2_ecc()
37 pr_err("Unable to find L2 ECC mapping in dtb\n"); in socfpga_init_l2_ecc()
41 /* Enable ECC */ in socfpga_init_l2_ecc()
52 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-a10-l2-ecc"); in socfpga_init_arria10_l2_ecc()
54 pr_err("Unable to find socfpga-a10-l2-ecc in dtb\n"); in socfpga_init_arria10_l2_ecc()
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H A Docram.c1 // SPDX-License-Identifier: GPL-2.0-only
21 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-ocram-ecc"); in socfpga_init_ocram_ecc()
23 pr_err("Unable to find socfpga-ocram-ecc\n"); in socfpga_init_ocram_ecc()
30 pr_err("Unable to map OCRAM ecc regs.\n"); in socfpga_init_ocram_ecc()
34 /* Clear any pending OCRAM ECC interrupts, then enable ECC */ in socfpga_init_ocram_ecc()
58 /* ECC Manager Defines */
89 * This function uses the memory initialization block in the Arria10 ECC
90 * controller to initialize/clear the entire memory data and ECC data.
97 while (limit--) { in altr_init_memory_port()
104 return -EBUSY; in altr_init_memory_port()
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/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
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/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
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/linux/drivers/edac/
H A Daltera_edac.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018, Intel Corporation. All rights reserved
4 * Copyright Altera Corporation (C) 2014-2016. All rights reserved.
5 * Copyright 2011-2012 Calxeda, Inc.
12 #include <linux/firmware/intel/stratix10-smc.h>
17 #include <linux/mfd/altera-sysmgr.h>
84 struct altr_sdram_mc_data *drvdata = mci->pvt_info; in altr_sdram_mc_err_handler()
85 const struct altr_sdram_prv_data *priv = drvdata->data; in altr_sdram_mc_err_handler()
88 regmap_read(drvdata->mc_vbase, priv->ecc_stat_offset, &status); in altr_sdram_mc_err_handler()
90 if (status & priv->ecc_stat_ue_mask) { in altr_sdram_mc_err_handler()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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