| /freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/ |
| H A D | floating-point.json | 15 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 26 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 32 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 37 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 54 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 59 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/icelake/ |
| H A D | floating-point.json | 15 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 26 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 32 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 37 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 54 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 59 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/ |
| H A D | floating-point.json | 14 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 20 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 31 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 36 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 42 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 47 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 53 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 58 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 64 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ |
| H A D | floating-point.json | 3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 8 …-bit packed computational double precision floating-point instructions retired; some instructions … 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 18 …-bit packed computational single precision floating-point instructions retired; some instructions … 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 28 …-bit packed double computational precision floating-point instructions retired; some instructions … 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 38 …-bit packed single computational precision floating-point instructions retired; some instructions … 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/ |
| H A D | floating-point.json | 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 71 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 76 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 82 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 87 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 93 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 98 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 109 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 115 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/ |
| H A D | floating-point.json | 3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 8 …-bit packed computational double precision floating-point instructions retired; some instructions … 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 18 …-bit packed computational single precision floating-point instructions retired; some instructions … 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 28 …-bit packed double computational precision floating-point instructions retired; some instructions … 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 38 …-bit packed single computational precision floating-point instructions retired; some instructions … 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 48 …-bit packed double precision floating-point instructions retired; some instructions will count twi… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/skylake/ |
| H A D | floating-point.json | 3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float… 8 …-bit packed computational double precision floating-point instructions retired; some instructions … 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float… 18 …-bit packed computational single precision floating-point instructions retired; some instructions … 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float… 28 …-bit packed double computational precision floating-point instructions retired; some instructions … 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float… 38 …-bit packed single computational precision floating-point instructions retired; some instructions … 43 …scription": "Counts once for most SIMD scalar computational double precision floating-point instru… 48 …precision floating-point instructions retired; some instructions will count twice as noted below. … [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleV6.td | 1 //===-- ARMScheduleV6.td - ARM v6 Scheduling Definitions ---*- tablegen -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 18 // Scheduling information derived from "ARM1176JZF-S Technical Reference Manual" 191 // RunFast mode so that NFP pipeline is used for single-precision when 197 // Single-precision FP Unary 200 // Double-precision FP Unary 203 // Single-precision FP Compare 206 // Double-precision FP Compare [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/ |
| H A D | floating-point.json | 3 …-bit packed double precision floating-point instructions retired. Each count represents 2 computa… 12 …-bit packed single precision floating-point instructions retired. Each count represents 4 computa… 21 …-bit packed double precision floating-point instructions retired. Each count represents 4 computa… 30 …-bit packed single precision floating-point instructions retired. Each count represents 8 computa… 39 …putational double precision floating-point instructions retired. Applies to SSE* and AVX*scalar, d… 48 …putational packed floating-point instructions retired. Applies to SSE* and AVX*, packed, double an… 57 …mputational scalar floating-point instructions retired. Applies to SSE* and AVX* scalar, double an… 66 …uble precision floating-point instructions retired. Each count represents 1 computation. Applies … 75 … single precision floating-point instructions retired. Each count represents 1 computation. Appli… 84 … computational single precision floating-point instructions retired. Applies to SSE* and AVX*scala… [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/ |
| H A D | floating-point.json | 3 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 12 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 30 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 39 …precision floating-point instructions retired; some instructions will count twice as noted below. … 48 …ng-point instructions retired; some instructions will count twice as noted below. Applies to SSE* … 57 …-point instructions retired; some instructions will count twice as noted below. Each count represe… 66 …precision floating-point instructions retired; some instructions will count twice as noted below. … 75 …single precision floating-point instructions retired; some instructions will count twice as noted … 84 …single precision floating-point instructions retired; some instructions will count twice as noted … [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/ |
| H A D | floating-point.json | 3 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 12 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 30 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 39 …precision floating-point instructions retired; some instructions will count twice as noted below. … 48 …ng-point instructions retired; some instructions will count twice as noted below. Applies to SSE* … 57 …-point instructions retired; some instructions will count twice as noted below. Each count represe… 66 …precision floating-point instructions retired; some instructions will count twice as noted below. … 75 …single precision floating-point instructions retired; some instructions will count twice as noted … 84 …single precision floating-point instructions retired; some instructions will count twice as noted … [all …]
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| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | avxneconvertintrin.h | 1 /*===-------------- avxneconvertintrin.h - AVXNECONVERT --------------------=== 5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 *===-----------------------------------------------------------------------=== 28 /// Convert scalar BF16 (16-bit) floating-point element 30 /// single-precision (32-bit) floating-point, broadcast it to packed 31 /// single-precision (32-bit) floating-point elements, and store the results in 43 /// A pointer to a 16-bit memory location. The address of the memory 46 /// A 128-bit vector of [4 x float]. 61 /// Convert scalar BF16 (16-bit) floating-point element 63 /// single-precision (32-bit) floating-point, broadcast it to packed [all …]
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| H A D | f16cintrin.h | 1 /*===---- f16cintrin.h - F16C intrinsics -----------------------------------=== 5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 *===-----------------------------------------------------------------------=== 23 /* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h, 28 /// Converts a 16-bit half-precision float value into a 32-bit float 36 /// A 16-bit half-precision float value. 37 /// \returns The converted 32-bit float value. 46 /// Converts a 32-bit single-precision float value to a 16-bit 47 /// half-precision float value. 58 /// A 32-bit single-precision float value to be converted to a 16-bit [all …]
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| /freebsd/lib/libc/softfloat/ |
| H A D | timesoftfloat.txt | 9 ------------------------------------------------------------------------------- 12 The `timesoftfloat' program evaluates the speed of SoftFloat's floating- 14 mode, tininess mode, and/or rounding precision. 17 ------------------------------------------------------------------------------- 25 -help 26 -precision32, -precision64, -precision80 27 -nearesteven, -tozero, -down, -up 28 -tininessbefore, -tininessafter 33 ------------------------------------------------------------------------------- 45 ------------------------------------------------------------------------------- [all …]
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| H A D | softfloat.txt | 9 ------------------------------------------------------------------------------- 12 SoftFloat is a software implementation of floating-point that conforms to 13 the IEC/IEEE Standard for Binary Floating-Point Arithmetic. As many as four 14 formats are supported: single precision, double precision, extended double 15 precision, and quadruple precision. All operations required by the standard 20 IEC/IEEE Floating-Point Standard. Details about the standard are available 24 ------------------------------------------------------------------------------- 28 SoftFloat header files assume an ISO/ANSI-style C compiler. No attempt 29 has been made to accommodate compilers that are not ISO-conformant. In 33 Support for the extended double-precision and quadruple-precision formats [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/ |
| H A D | floating-point.json | 54 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue… 59 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issu… 64 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue… 69 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issu… 74 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue… 79 … "PublicDescription": "Counts number of SSE* or AVX-128 double precision FP scalar uops executed.", 84 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue… 89 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issu… 122 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.", 127 "PublicDescription": "Number of assists associated with 256-bit AVX store operations.", [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/ |
| H A D | floating-point.json | 54 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue… 59 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issu… 64 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue… 69 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issu… 74 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue… 79 … "PublicDescription": "Counts number of SSE* or AVX-128 double precision FP scalar uops executed.", 84 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue… 89 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issu… 122 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.", 127 "PublicDescription": "Number of assists associated with 256-bit AVX store operations.", [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/ |
| H A D | floating-point.json | 93 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 115 …-bit packed double precision floating-point instructions retired; some instructions will count twi… 126 …-bit packed single precision floating-point instructions retired; some instructions will count twi… 137 …precision floating-point instructions retired; some instructions will count twice as noted below. … 148 …single precision floating-point instructions retired; some instructions will count twice as noted …
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| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/ |
| H A D | floating-point.json | 5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.", 6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.", 13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.", 20 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.", 27 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… 33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.", 34 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F… [all …]
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/ |
| H A D | truncdfsf2vfp.S | 1 //===-- truncdfsf2vfp.S - Implement truncdfsf2vfp -------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 14 // Converts double precision float to single precision result. 15 // Uses Darwin calling convention where a double precision parameter is 16 // passed in a R0/R1 pair and a single precision result is returned in R0. 25 vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
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| H A D | extendsfdf2vfp.S | 1 //===-- extendsfdf2vfp.S - Implement extendsfdf2vfp -----------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 14 // Converts single precision float to double precision result. 15 // Uses Darwin calling convention where a single precision parameter is 16 // passed in a GPR and a double precision result is returned in R0/R1 pair. 25 vcvt.f64.f32 d7, s15 // convert single to double
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| /freebsd/contrib/libcbor/src/cbor/ |
| H A D | floats_ctrls.h | 2 * Copyright (c) 2014-2020 Pavel Kalvoda <me@pavelkalvoda.com> 40 /** Get a half precision float 44 * @param item A half precision float 45 * @return half precision value 50 /** Get a single precision float 54 * @param item A single precision float 55 * @return single precision value 60 /** Get a double precision float 64 * @param item A double precision float 65 * @return double precision value [all …]
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| /freebsd/usr.bin/printf/ |
| H A D | printf.1 | 63 .Bl -bullet -offset indent -compact 67 If the leading character is a single or double quote, the value is the 77 .St -ansiC , 82 .Bl -tag -width Ds -offset indent -compact 88 Write a <form-feed> character. 90 Write a <new-line> character. 98 Write a <single quote> character. 103 value is the 1-, 2-, or 3-digit 115 .Bl -tag -width Ds 117 .Bl -tag -width Ds [all …]
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| /freebsd/lib/msun/man/ |
| H A D | ieee.3 | 33 .Nd IEEE standard 754 for floating-point arithmetic 35 The IEEE Standard 754 for Binary Floating-Point Arithmetic 36 defines representations of floating-point numbers and abstract 37 properties of arithmetic operations relating to precision, 39 .Ss IEEE STANDARD 754 Floating-Point Arithmetic 43 .Bd -ragged -offset indent -compact 49 Zero is represented ambiguously as +0 or \-0. 50 .Bd -ragged -offset indent -compact 53 with like signs; but x\-x yields +0 for every 57 .Fn copysign x \(+-0 . [all …]
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| /freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/ |
| H A D | floating-point.json | 49 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue… 58 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue… 67 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue… 76 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue… 94 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.", 103 … "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", 112 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", 121 … "BriefDescription": "Number of AVX-256 Computational FP double precision uops issued this cycle.", 130 …"BriefDescription": "Number of GSSE-256 Computational FP single precision uops issued this cycle.",
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