Searched +full:sdr +full:- +full:syscon (Results 1 – 8 of 8) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/arm/altera/ |
| H A D | socfpga-sdram-controller.txt | 4 - compatible : Should contain "altr,sdr-ctl" and "syscon". 5 syscon is required by the Altera SOCFPGA SDRAM EDAC. 6 - reg : Should contain 1 register range (address and length) 9 sdr: sdr@ffc25000 { 10 compatible = "altr,sdr-ctl", "syscon";
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| H A D | socfpga-sdram-edac.txt | 5 - compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10" 6 - altr,sdr-syscon : phandle of the sdr module 7 - interrupts : Should contain the SDRAM ECC IRQ in the 12 compatible = "altr,sdram-edac"; 13 altr,sdr-syscon = <&sdr>;
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| /freebsd/sys/contrib/device-tree/Bindings/edac/ |
| H A D | altr,socfpga-ecc-manager.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/edac/altr,socfpga-ecc-manager.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Matthew Gerlach <matthew.gerlach@altera.com> 22 - items: 23 - const: altr,socfpga-s10-ecc-manager 24 - const: altr,socfpga-a10-ecc-manager 25 - const: altr,socfpga-a10-ecc-manager 26 - const: altr,socfpga-ecc-manager [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | syscon.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mfd/syscon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 represent as any specific type of device. The typical use-case is 13 for some other node's driver, or platform-specific code, to acquire 14 a reference to the syscon node (e.g. by phandle, node path, or 20 - Lee Jones <lee@kernel.org> 24 # syscon fallback. 30 - airoha,en7581-pbus-csr [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/intel/ |
| H A D | socfpga_agilex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/agilex-clock.h> 13 compatible = "intel,socfpga-agilex"; 14 #address-cells = <2>; 15 #size-cells = <2>; 17 reserved-memory { [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/altera/ |
| H A D | socfpga_stratix10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/stratix10-clock.h> 12 compatible = "altr,socfpga-stratix10"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 reserved-memory { 17 #address-cells = <2>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/ |
| H A D | socfpga_arria10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/altr,rst-mgr-a10.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 enable-method = "altr,socfpga-a10-smp"; 19 compatible = "arm,cortex-a9"; 22 next-level-cache = <&L2>; [all …]
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| H A D | socfpga.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/reset/altr,rst-mgr.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 22 #address-cells = <1>; 23 #size-cells = <0>; 24 enable-metho 817 sdr: sdr@ffc25000 { global() label [all...] |