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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dloongson,ls2k-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/loongson,ls2k-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 SoC Pinctrl Controller
10 - zhanghongchen <zhanghongchen@loongson.cn>
11 - Yinbo Zhu <zhuyinbo@loongson.cn>
14 - $ref: pinctrl.yaml#
18 const: loongson,ls2k-pinctrl
24 '-pins$':
[all …]
H A Dbrcm,ns-pinmux.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/brcm,ns-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
23 - brcm,bcm4708-pinmux
24 - brcm,bcm4709-pinmux
25 - brcm,bcm53012-pinmux
30 reg-names:
34 '-pins$':
[all …]
H A Dbrcm,nsp-pinmux.txt7 - compatible:
8 Must be "brcm,nsp-pinmux"
10 - reg:
15 - function:
18 - groups:
22 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
26 pinmux: pinmux@1803f1c0 {
27 compatible = "brcm,nsp-pinmux";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pwm>, <&gpio_b>, <&nand_sel>;
[all …]
H A Dnuvoton,wpcm450-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,wpcm450-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
14 const: nuvoton,wpcm450-pinctrl
19 '#address-cells':
22 '#size-cells':
28 # 2. a pinmux node configures pin muxing for a group of pins (e.g. rmii2)
31 "^gpio@[0-7]$":
[all …]
H A Dbitmain,bm1880-pinctrl.txt7 - compatible: Should be "bitmain,bm1880-pinctrl"
8 - reg: Offset and length of pinctrl space in SCTRL.
10 Please refer to pinctrl-bindings.txt in this directory for details of the
17 includes pinmux and various pin configuration parameters, such as pull-up,
20 Each configuration node can consist of multiple nodes describing the pinmux
24 The following generic properties as defined in pinctrl-bindings.txt are valid
25 to specify in a pinmux subnode:
29 - pins: An array of strings, each string containing the name of a pin.
32 MIO0 - MIO111
34 - groups: An array of strings, each string containing the name of a pin
[all …]
H A Dbrcm,ns2-pinmux.txt8 - compatible:
9 Must be "brcm,ns2-pinmux"
11 - reg:
17 - function:
20 - groups:
23 - pins:
26 The generic properties bias-disable, bias-pull-down, bias-pull-up,
27 drive-strength, slew-rate, input-enable, input-disable are supported
31 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
36 compatible = "brcm,ns2-pinmux";
[all …]
H A Dthead,th1520-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-Head TH1520 SoC pin controller
10 - Emil Renner Berthing <emil.renner.berthing@canonical.com>
13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
17 PADCTRL_AOSYS -> PAD Group 1
18 PADCTRL1_APSYS -> PAD Group 2
19 PADCTRL0_APSYS -> PAD Group 3
[all …]
H A Dmarvell,ac5-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/marvell,ac5-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
13 Bindings for Marvell's AC5 memory-mapped pin controller.
18 - const: marvell,ac5-pinctrl
24 '-pins$':
26 $ref: pinmux-node.yaml#
34 enum: [ dev_init_done, ge, gpio, i2c0, i2c1, int_out, led, nand, pcie, ptp, sdio,
[all …]
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k1000-ref.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "loongson-2k1000.dtsi"
11 compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
12 model = "Loongson-2K1000 Reference Board";
19 stdout-path = "serial0:115200n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
35 compatible = "shared-dma-pool";
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
[all …]
H A Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
56 gpio-controller;
57 #gpio-cells = <2>;
58 interrupt-controller;
[all …]
H A Dstm32mp151a-prtt1c.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include "stm32mp151a-prtt1l.dtsi"
14 clock_ksz9031: clock-ksz9031 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <25000000>;
20 clock_sja1105: clock-sja1105 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]
H A Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
41 #sound-dai-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
H A Dmt6795-sony-xperia-m5.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
14 compatible = "sony,xperia-m5", "mediatek,mt6795";
15 chassis-type = "handset";
26 compatible = "led-backlight";
29 default-brightness-level = <300>;
32 led-controller-display {
33 compatible = "pwm-leds";
35 disp_led_pwm: led-0 {
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d27_som1_ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
10 /dts-v1/;
11 #include "at91-sama5d27_som1.dtsi"
12 #include <dt-bindings/mfd/atmel-flexcom.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
18 …compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "…
29 stdout-path = "serial0:115200n8";
34 atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhikey970-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range {
11 #pinctrl-single,gpio-range-cells = <3>;
14 pmx0: pinmux@e896c000 {
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
[all …]
H A Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range {
13 #pinctrl-single,gpio-range-cells = <3>;
16 pmx0: pinmux@e896c000 {
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
[all …]
H A Dhikey-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
10 pmx0: pinmux@f7010000 {
11 pinctrl-names = "default";
12 pinctrl-0 = <
20 boot_sel_pmx_func: boot-sel-pins {
21 pinctrl-single,pins = <
26 emmc_pmx_func: emmc-pins {
27 pinctrl-single,pins = <
41 sd_pmx_func: sd-pins {
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g011-v2mevk2.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/rzv2m-pinctrl.h>
23 stdout-path = "serial0:115200n8";
27 compatible = "usb-c-connector";
28 label = "USB-C";
29 data-role = "dual";
32 #address-cells = <1>;
33 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "ucrobotics,bubblegum-96", "actions,s900";
12 model = "Bubblegum-96";
22 stdout-path = "serial5:115200n8";
31 vcc_3v1: vcc-3v1 {
32 compatible = "regulator-fixed";
33 regulator-name = "fixed-3.1V";
34 regulator-min-microvolt = <3100000>;
35 regulator-max-microvolt = <3100000>;
[all …]
/linux/arch/arm/boot/dts/actions/
H A Dowl-s500-roseapplepi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (C) 2020-2021 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
8 /dts-v1/;
10 #include "owl-s500.dtsi"
22 stdout-path = "serial2:115200n8";
30 syspwr: regulator-5v0 {
31 compatible = "regulator-fixed";
32 regulator-name = "SYSPWR";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
[all …]
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-ns.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pinctrl/pinconf-generic.h>
12 #include <linux/pinctrl/pinmux.h>
18 #include "../pinmux.h"
141 NS_FUNCTION("sdio", sdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
172 return -EINVAL; in ns_pinctrl_set_mux()
174 for (i = 0; i < group->grp.npins; i++) in ns_pinctrl_set_mux()
175 unset |= BIT(group->grp.pins[i]); in ns_pinctrl_set_mux()
177 tmp = readl(ns_pinctrl->base); in ns_pinctrl_set_mux()
179 writel(tmp, ns_pinctrl->base); in ns_pinctrl_set_mux()
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-lg-p880.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-lg-x3.dtsi"
15 pinmux@70000868 {
16 pinctrl-names = "default";
17 pinctrl-0 = <&state_default>;
19 state_default: pinmux {
20 /* WLAN SDIO pinmux */
21 host-wlan-wake {
26 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]

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