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Searched +full:rt2880 +full:- +full:pinctrl (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Dralink,rt2880-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/ralink,rt2880-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ralink RT2880 Pin Controller
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
14 Ralink RT2880 pin controller for RT2880 SoC.
20 const: ralink,rt2880-pinctrl
23 '-pins$':
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/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-rt2880.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "pinctrl-mtmips.h"
43 { .compatible = "ralink,rt2880-pinctrl" },
44 { .compatible = "ralink,rt2880-pinmux" },
52 .name = "rt2880-pinctrl",
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_EINT_MTK) += mtk-eint.o
4 obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
5 obj-$(CONFIG_PINCTRL_MTK_V2) += pinctrl-mtk-common-v2.o
6 obj-$(CONFIG_PINCTRL_MTK_MTMIPS) += pinctrl-mtmips.o
7 obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o
8 obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o
11 obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o
12 obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o
13 obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
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H A Dpinctrl-mt7621.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
99 { .compatible = "ralink,mt7621-pinctrl" },
100 { .compatible = "ralink,rt2880-pinmux" },
108 .name = "mt7621-pinctrl",
H A Dpinctrl-rt3883.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
59 FUNC("pci-dev", 0, 40, 32),
60 FUNC("pci-host2", 1, 40, 32),
61 FUNC("pci-host1", 2, 40, 32),
62 FUNC("pci-fnc", 3, 40, 32)
90 { .compatible = "ralink,rt3883-pinctrl" },
91 { .compatible = "ralink,rt2880-pinmux" },
99 .name = "rt3883-pinctrl",
H A Dpinctrl-rt305x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <asm/mach-ralink/ralink_regs.h>
4 #include <asm/mach-ralink/rt305x.h>
8 #include "pinctrl-mtmips.h"
116 return -EINVAL; in rt305x_pinctrl_probe()
120 { .compatible = "ralink,rt305x-pinctrl" },
121 { .compatible = "ralink,rt3352-pinctrl" },
122 { .compatible = "ralink,rt5350-pinctrl" },
123 { .compatible = "ralink,rt2880-pinmux" },
131 .name = "rt305x-pinctrl",
H A Dpinctrl-mt7620.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
119 { .compatible = "ralink,mt7620-pinctrl" },
120 { .compatible = "ralink,rt2880-pinmux" },
128 .name = "mt7620-pinctrl",
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "MediaTek pinctrl drivers"
72 bool "Ralink RT2880 pin control"
H A Dpinctrl-mt76x8.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "pinctrl-mtmips.h"
230 { .compatible = "ralink,mt76x8-pinctrl" },
231 { .compatible = "ralink,mt7620-pinctrl" },
232 { .compatible = "ralink,rt2880-pinmux" },
240 .name = "mt76x8-pinctrl",
/linux/arch/mips/boot/dts/ralink/
H A Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
24 cpuintc: interrupt-controller {
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/linux/arch/mips/ralink/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
61 select PINCTRL
64 The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
65 dual-core CPU, a 5-port 10/100/1000 switch/PHY and one RGMII.
79 bool "RT2880 eval kit"
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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