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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412-ppmu-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree sources for Exynos4412 PPMU common device tree
13 ppmu_dmc0_3: ppmu-event3-dmc0 {
14 event-name = "ppmu-event3-dmc0";
23 ppmu_dmc1_3: ppmu-event3-dmc1 {
24 event-name = "ppmu-event3-dmc1";
33 ppmu_leftbus_3: ppmu-event3-leftbus {
34 event-name = "ppmu-event3-leftbus";
43 ppmu_rightbus_3: ppmu-event3-rightbus {
44 event-name = "ppmu-event3-rightbus";
/freebsd/sys/contrib/device-tree/Bindings/devfreq/event/
H A Dexynos-ppmu.txt2 * Samsung Exynos PPMU (Platform Performance Monitoring Unit) device
4 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
5 each IP. PPMU provides the primitive values to get performance data. These
6 PPMU events provide information of the SoC's behaviors so that you may
8 usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
9 The Exynos PPMU driver uses the devfreq-event class to provide event data
13 Required properties for PPMU device:
14 - compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2.
15 - reg: physical base address of each PPMU and length of memory mapped region.
17 Optional properties for PPMU device:
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H A Dsamsung,exynos-ppmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-ppmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC PPMU (Platfor
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/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dsamsung,exynos-bus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses.
18 monitor the usage of each bus in runtime, the driver uses the PPMU (Platform
20 sub-blocks.
22 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
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