Home
last modified time | relevance | path

Searched +full:port +full:- +full:mapping +full:- +full:mode (Results 1 – 25 of 622) sorted by relevance

12345678910>>...25

/linux/arch/alpha/kernel/
H A Dsmc37c669.c60 * er 28-Jan-1997 Initial Entry
69 ** The mask acts as a flag used in mapping actual ISA IRQs (0 - 15)
70 ** to device IRQs (A - H).
83 ** The mask acts as a flag used in mapping actual ISA DMA
84 ** channels to device DMA channels (A - C).
218 ** CR00 - default value 0x28
221 ** 0x - 30ua pull-ups on nIDEEN, nHDCS0, NHDCS1
222 ** 11 - IRQ_H available as IRQ output,
224 ** 10 - nIDEEN, nHDCS0, nHDCS1 used to control IDE
247 ** CR01 - default value 0x9C
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
14 describing a port needs to have a valid phandle referencing the internal PHY
15 it is connected to. This is because there is no N:N mapping of port and PHY
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
17 the switch node and declare the phandle for the port, referencing the internal
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
[all …]
/linux/tools/testing/selftests/drivers/net/hw/
H A Ddevlink_rate_tc_bw.py2 # SPDX-License-Identifier: GPL-2.0
8 This test suite verifies the functionality of devlink-rate traffic class (TC)
11 that TC mapping works as expected.
14 ----------------
15 - Creates 1 VF
16 - Establishes a bridge connecting the VF representor and the uplink representor
17 - Sets up 2 VLAN interfaces on the VF with different VLAN IDs (101, 102)
18 - Configures different traffic classes (TC3 and TC4) for each VLAN
21 ----------
23 - Verifies that without TC mapping, bandwidth is NOT distributed according to
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,wcd939x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9390/WCD9395 Codec is a standalone Hi-Fi audio codec IC.
15 The WCD9390/WCD9395 IC has a functionally separate USB-C Mux subsystem
17 The Audio Headphone and Microphone data path between the Codec and the USB-C Mux
18 subsystems are external to the IC, thus requiring DT port-endpoint graph description
19 to handle USB-C altmode & orientation switching for Audio Accessory Mode.
22 - $ref: dai-common.yaml#
[all …]
/linux/drivers/net/ethernet/microchip/vcap/
H A Dvcap_ag_api.h1 /* SPDX-License-Identifier: BSD-3-Clause */
6 /* This file is autogenerated by cml-utils 2023-03-13 10:16:42 +0100.
63 * Used by 802.1BR Bridge Port Extension in an E-Tag
65 * Used by 802.1BR Bridge Port Extension in an E-Tag
67 * Set for frames containing an E-TAG (802.1BR Ethertype 893f)
69 * E-Tag group bits in 802.1BR Bridge Port Extension
71 * Used by 802.1BR Bridge Port Extension in an E-Tag
73 * Used by 802.1BR Bridge Port Extension in an E-Tag
78 * First DEI in multiple vlan tags (outer tag or default port tag)
86 * First PCP in multiple vlan tags (outer tag or default port tag)
[all …]
/linux/sound/drivers/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
50 tristate "PC-Speaker support (READ HELP!)"
60 You can compile this as a module which will be called snd-pcsp.
65 pc-speaker a default sound device. Which is likely not
69 options snd-pcsp index=2
71 You don't need this driver if you only want your pc-speaker to beep.
90 will be called snd-dummy.
99 the standard ALSA PCM device. The devices are routed 0->1 and
100 1->0, where first number is the playback PCM device and second
106 timing source using the time shift universal control (+-20%
[all …]
/linux/drivers/net/dsa/microchip/
H A Dlan937x_main.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2024 Microchip Technology Inc.
21 /* marker for ports without built-in PHY */
25 * lan9370_phy_addr - Mapping of LAN9370 switch ports to PHY addresses.
27 * Each entry corresponds to a specific port on the LAN9370 switch,
28 * where ports 1-4 are connected to integrated 100BASE-T1 PHYs, and
29 * Port 5 is connected to an RGMII interface without a PHY. The values
33 [0] = 2, /* Port 1, T1 AFE0 */
34 [1] = 3, /* Port 2, T1 AFE1 */
35 [2] = 5, /* Port 3, T1 AFE3 */
[all …]
H A Dksz_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2017-2025 Microchip Technology Inc.
13 #include <linux/pcs/pcs-xpcs.h>
18 #include <linux/platform_data/microchip-ksz.h>
114 struct ksz_port *port; member
133 u32 fiber:1; /* port is fiber */
182 int cpu_port; /* port connected to CPU */
207 * @phy_addr_map: Array mapping switch ports to their corresponding PHY
354 u32 (*get_port_addr)(int port, int offset);
355 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
[all …]
/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6q-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The LVDS Display Bridge device tree node contains up to two lvds-channel
14 - Frank Li <Frank.Li@nxp.com>
19 - enum:
20 - fsl,imx53-ldb
21 - items:
22 - enum:
[all …]
/linux/include/linux/
H A Dif_team.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/linux/if_team.h - Network team device driver header
33 int index; /* index of enabled port. If disabled, it's set to -1 */
55 * become a port.
68 struct list_head qom_list; /* node in queue override mapping list */
75 return rcu_dereference(dev->rx_handler_data); in team_port_get_rcu()
78 static inline bool team_port_enabled(struct team_port *port) in team_port_enabled() argument
80 return port->index != -1; in team_port_enabled()
83 static inline bool team_port_txable(struct team_port *port) in team_port_txable() argument
85 return port->linkup && team_port_enabled(port); in team_port_txable()
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dthine,thc63lvd1024.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
19 Single or dual operation mode, output data mapping and DDR output modes are
32 When operating in single input mode, all pixels are received on port@0,
33 and port@1 shall not contain any endpoint. In dual input mode,
34 even-numbered pixels are received on port@0 and odd-numbered pixels on
35 port@1, and both port@0 and port@1 shall contain endpoints.
[all …]
/linux/include/uapi/linux/
H A Dkd.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 unsigned short charheight; /* scan lines per character (1-32) */
39 #define KDADDIO 0x4B34 /* add i/o port as valid */
40 #define KDDELIO 0x4B35 /* del i/o port as valid */
44 #define KDSETMODE 0x4B3A /* set text/graphics mode */
49 #define KDGETMODE 0x4B3B /* get current mode */
56 #define GIO_SCRNMAP 0x4B40 /* get screen mapping from kernel */
57 #define PIO_SCRNMAP 0x4B41 /* put screen mapping table in kernel */
58 #define GIO_UNISCRNMAP 0x4B69 /* get full Unicode screen mapping */
59 #define PIO_UNISCRNMAP 0x4B6A /* set full Unicode screen mapping */
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8750-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
20 #include "sm8750-pmics.dtsi"
24 compatible = "qcom,sm8750-qrd", "qcom,sm8750";
25 chassis-type = "handset";
31 wcd939x: audio-codec {
32 compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";
[all …]
/linux/drivers/ntb/hw/idt/
H A Dntb_hw_idt.h7 * Copyright (C) 2016-2018 T-Platforms JSC All Rights Reserved.
36 * IDT PCIe-switch NTB Linux driver
39 * Serge Semin <fancer.lancer@gmail.com>, <Sergey.Semin@t-platforms.ru>
55 * the supported IDT PCIe-switches
66 * IDT PCIe-switches device IDs
78 * NT-function Configuration Space registers
79 * NOTE 1) The IDT PCIe-switch internal data is little-endian
83 * with byte-enables corresponding to their native size or
86 * So to simplify the driver code, there is only DWORD-sized read/write
107 /* IDT Proprietary NT-port-specific registers */
[all …]
/linux/Documentation/arch/arm/
H A Dbooting.rst9 The following documentation is relevant to 2.4.18-rmk6 and beyond.
20 2. Initialise one serial port.
28 ---------------------------
43 2. Initialise one serial port
44 -----------------------------
51 The boot loader should initialise and enable one serial port on the
53 which serial port it should use for the kernel console (generally
57 option to the kernel via the tagged lists specifying the port, and
60 Documentation/admin-guide/kernel-parameters.rst.
64 --------------------------
[all …]
/linux/Documentation/driver-api/
H A Dpin-control.rst9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
30 be sparse - i.e. there may be gaps in the space with numbers where no
60 .. code-block:: c
97 See ``arch/arm/mach-ux500/Kconfig`` for an example.
[all …]
/linux/drivers/gpu/drm/imx/ipuv3/
H A Dimx-ldb.c1 // SPDX-License-Identifier: GPL-2.0+
3 * i.MX drm driver - LVDS display bridge
11 #include <linux/media-bus-format.h>
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
33 #include "imx-drm.h"
35 #define DRIVER_NAME "imx-ldb"
73 return container_of(e, struct imx_ldb_encoder, encoder)->channel; in enc_to_imx_ldb_ch()
97 struct imx_ldb *ldb = imx_ldb_ch->ldb; in imx_ldb_ch_set_bus_format()
98 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; in imx_ldb_ch_set_bus_format()
104 if (imx_ldb_ch->chno == 0 || dual) in imx_ldb_ch_set_bus_format()
[all …]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dglobal1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
18 int addr = chip->info->global1_addr; in mv88e6xxx_g1_read()
25 int addr = chip->info->global1_addr; in mv88e6xxx_g1_write()
33 return mv88e6xxx_wait_bit(chip, chip->info->global1_addr, reg, in mv88e6xxx_g1_wait_bit()
40 return mv88e6xxx_wait_mask(chip, chip->info->global1_addr, reg, in mv88e6xxx_g1_wait_mask()
98 /* Returns 0 when done, -EBUSY when waiting, other negative codes on error */
106 dev_err(chip->dev, "Error reading status"); in mv88e6xxx_g1_is_eeprom_done()
116 return -EBUSY; in mv88e6xxx_g1_is_eeprom_done()
135 if (ret != -EBUSY) in mv88e6xxx_g1_wait_eeprom_done()
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_init.h4 * Copyright (c) 2007-2013 Broadcom Corporation
29 OP_WB_ZR, /* Clear a string using DMAE or indirect-wr */
186 /* Vnics per mode */
190 /* COS offset for port1 in E3 B0 4port mode */
201 /* extracts the QM queue number for the specified port and vnic */
202 #define BNX2X_PF_Q_NUM(q_num, port, vnic)\ argument
203 ((((port) << 1) | (vnic)) * 16 + (q_num))
209 /* find current COS mapping */ in bnx2x_map_q_cos()
212 /* check if queue->COS mapping has changed */ in bnx2x_map_q_cos()
217 /* update parameters for 4port mode */ in bnx2x_map_q_cos()
[all …]
H A Dbnx2x_cmn.c3 * Copyright (c) 2007-2013 Broadcom Corporation
47 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi_cnic()
57 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi()
74 * bnx2x_move_fp - move content of the fastpath structure.
80 * Makes sure the contents of the bp->fp[to].napi is kept
88 struct bnx2x_fastpath *from_fp = &bp->fp[from]; in bnx2x_move_fp()
89 struct bnx2x_fastpath *to_fp = &bp->fp[to]; in bnx2x_move_fp()
90 struct bnx2x_sp_objs *from_sp_objs = &bp->sp_objs[from]; in bnx2x_move_fp()
91 struct bnx2x_sp_objs *to_sp_objs = &bp->sp_objs[to]; in bnx2x_move_fp()
92 struct bnx2x_fp_stats *from_fp_stats = &bp->fp_stats[from]; in bnx2x_move_fp()
[all …]
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_prueth.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
34 #include <linux/dma-mapping.h>
35 #include <linux/dma/ti-cppi5.h>
36 #include <linux/dma/k3-udma-glue.h>
46 #define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN)
63 #define ICSSG_NUM_ETHTOOL_STATS (ICSSG_NUM_STATS - ICSSG_NUM_STANDARD_STATS)
97 /* In switch mode there are 3 real ports i.e. 3 mac addrs.
98 * however Linux sees only the host side port. The other 2 ports
100 * In emac mode there are 2 real ports i.e. 2 mac addrs.
[all …]
/linux/drivers/phy/mediatek/
H A Dphy-mtk-mipi-csi-0-5.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/phy/phy.h>
19 #include "phy-mtk-io.h"
20 #include "phy-mtk-mipi-csi-0-5-rx-reg.h"
29 u32 mode; member
75 struct mtk_mipi_cdphy_port *port = phy_get_drvdata(phy); in mtk_mipi_phy_power_on() local
76 void __iomem *base = port->base; in mtk_mipi_phy_power_on()
79 * The driver currently supports DPHY and CD-PHY phys, in mtk_mipi_phy_power_on()
80 * but the only mode supported is DPHY, in mtk_mipi_phy_power_on()
81 * so CD-PHY capable phys must be configured in DPHY mode in mtk_mipi_phy_power_on()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/lag/
H A Dlag.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
54 static int get_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags) in get_port_sel_mode() argument
59 if (mode == MLX5_LAG_MODE_MPESW) in get_port_sel_mode()
72 mlx5_infer_tx_enabled(&ldev->tracker, ldev, enabled_ports, in lag_active_port_bits()
81 int mode, unsigned long flags) in mlx5_cmd_create_lag() argument
85 int port_sel_mode = get_port_sel_mode(mode, flags); in mlx5_cmd_create_lag()
87 u8 *ports = ldev->v2p_map; in mlx5_cmd_create_lag()
98 return -EINVAL; in mlx5_cmd_create_lag()
130 return -EINVAL; in mlx5_cmd_modify_lag()
[all …]
/linux/arch/m68k/kernel/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0-or-later
2 ** -*- mode: asm -*-
4 ** head.S -- This file contains the initial boot code for the
19 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
20 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
22 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
23 ** Magnum- and FX-alternate ram
26 ** for linux-2.1.115
41 * . Set up initial kernel memory mapping.
42 * . This sets up a mapping of the 4M of memory the kernel is located in.
[all …]
/linux/drivers/soundwire/
H A Dmipi_disco.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
47 * sdw_master_read_prop() - Read Master properties
52 struct sdw_master_prop *prop = &bus->prop; in sdw_master_read_prop()
60 device_property_read_u32(bus->dev, in sdw_master_read_prop()
61 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
62 &prop->revision); in sdw_master_read_prop()
66 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
68 link = device_get_named_child_node(bus->dev, name); in sdw_master_read_prop()
70 dev_err(bus->dev, "Master node %s not found\n", name); in sdw_master_read_prop()
[all …]

12345678910>>...25