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Searched full:pctrl (Results 1 – 25 of 45) sorted by relevance

12

/linux/drivers/pinctrl/qcom/
H A Dpinctrl-msm.c45 * @pctrl: pinctrl handle.
64 struct pinctrl_dev *pctrl; member
86 static u32 msm_readl_##name(struct msm_pinctrl *pctrl, \
89 return readl(pctrl->regs[g->tile] + g->name##_reg); \
91 static void msm_writel_##name(u32 val, struct msm_pinctrl *pctrl, \
94 writel(val, pctrl->regs[g->tile] + g->name##_reg); \
102 static u32 msm_readl_intr_target(struct msm_pinctrl *pctrl, in MSM_ACCESSOR()
107 return readl(pctrl->regs[g->tile] + reg); in MSM_ACCESSOR()
110 static void msm_writel_intr_target(u32 val, struct msm_pinctrl *pctrl, in msm_writel_intr_target() argument
115 writel(val, pctrl->regs[g->tile] + reg); in msm_writel_intr_target()
[all …]
/linux/drivers/pinctrl/actions/
H A Dpinctrl-owl.c69 static u32 owl_read_field(struct owl_pinctrl *pctrl, u32 reg, in owl_read_field() argument
74 tmp = readl_relaxed(pctrl->base + reg); in owl_read_field()
80 static void owl_write_field(struct owl_pinctrl *pctrl, u32 reg, u32 arg, in owl_write_field() argument
88 owl_update_bits(pctrl->base + reg, mask, (arg << bit)); in owl_write_field()
93 struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev); in owl_get_groups_count() local
95 return pctrl->soc->ngroups; in owl_get_groups_count()
101 struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev); in owl_get_group_name() local
103 return pctrl->soc->groups[group].name; in owl_get_group_name()
111 struct owl_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrldev); in owl_get_group_pins() local
113 *pins = pctrl->soc->groups[group].pads; in owl_get_group_pins()
[all …]
/linux/drivers/pinctrl/sophgo/
H A Dpinctrl-sophgo-common.c42 const struct sophgo_pin *sophgo_get_pin(struct sophgo_pinctrl *pctrl, in sophgo_get_pin() argument
45 return bsearch((void *)pin_id, pctrl->data->pindata, pctrl->data->npins, in sophgo_get_pin()
46 pctrl->data->pinsize, sophgo_cmp_pin); in sophgo_get_pin()
49 static int sophgo_verify_pinmux_config(struct sophgo_pinctrl *pctrl, in sophgo_verify_pinmux_config() argument
52 if (pctrl->data->cfg_ops->verify_pinmux_config) in sophgo_verify_pinmux_config()
53 return pctrl->data->cfg_ops->verify_pinmux_config(config); in sophgo_verify_pinmux_config()
57 static int sophgo_verify_pin_group(struct sophgo_pinctrl *pctrl, in sophgo_verify_pin_group() argument
61 if (pctrl->data->cfg_ops->verify_pin_group) in sophgo_verify_pin_group()
62 return pctrl->data->cfg_ops->verify_pin_group(config, npins); in sophgo_verify_pin_group()
67 struct sophgo_pinctrl *pctrl, in sophgo_dt_node_to_map_post() argument
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-amdisp.c47 struct pinctrl_dev *pctrl; member
58 struct amdisp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in amdisp_get_groups_count() local
60 return pctrl->data->ngroups; in amdisp_get_groups_count()
66 struct amdisp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in amdisp_get_group_name() local
68 return pctrl->data->groups[group].name; in amdisp_get_group_name()
76 struct amdisp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in amdisp_get_group_pins() local
78 *pins = pctrl->data->groups[group].pins; in amdisp_get_group_pins()
79 *num_pins = pctrl->data->groups[group].npins; in amdisp_get_group_pins()
111 struct amdisp_pinctrl *pctrl = gpiochip_get_data(gc); in amdisp_gpio_get() local
113 raw_spin_lock_irqsave(&pctrl->lock, flags); in amdisp_gpio_get()
[all …]
H A Dpinctrl-eyeq5.c325 static void eq5p_update_bits(const struct eq5p_pinctrl *pctrl, in eq5p_update_bits() argument
329 void __iomem *ptr = pctrl->base + bank->regs[reg]; in eq5p_update_bits()
334 static bool eq5p_test_bit(const struct eq5p_pinctrl *pctrl, in eq5p_test_bit() argument
338 u32 val = readl(pctrl->base + bank->regs[reg]); in eq5p_test_bit()
346 static int eq5p_pin_to_bank_offset(const struct eq5p_pinctrl *pctrl, unsigned int pin, in eq5p_pin_to_bank_offset() argument
349 for (unsigned int i = 0; i < pctrl->data->nbanks; i++) { in eq5p_pin_to_bank_offset()
350 const struct eq5p_bank *_bank = &pctrl->data->banks[i]; in eq5p_pin_to_bank_offset()
366 struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in eq5p_pinctrl_get_groups_count() local
368 return pctrl->data->npins; in eq5p_pinctrl_get_groups_count()
391 struct eq5p_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in eq5p_pinconf_get() local
[all …]
H A Dpinctrl-loongson2.c203 struct loongson2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pcdev); in loongson2_pmx_set_mux() local
204 void __iomem *reg = pctrl->reg_base + in loongson2_pmx_set_mux()
210 spin_lock_irqsave(&pctrl->lock, flags); in loongson2_pmx_set_mux()
217 spin_unlock_irqrestore(&pctrl->lock, flags); in loongson2_pmx_set_mux()
254 struct loongson2_pinctrl *pctrl; in loongson2_pinctrl_probe() local
256 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); in loongson2_pinctrl_probe()
257 if (!pctrl) in loongson2_pinctrl_probe()
260 pctrl->reg_base = devm_platform_ioremap_resource(pdev, 0); in loongson2_pinctrl_probe()
261 if (IS_ERR(pctrl->reg_base)) in loongson2_pinctrl_probe()
262 return PTR_ERR(pctrl->reg_base); in loongson2_pinctrl_probe()
[all …]
H A Dpinctrl-zynqmp.c71 * @pctrl: Pin control device
82 struct pinctrl_dev *pctrl; member
106 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynqmp_pctrl_get_groups_count() local
108 return pctrl->ngroups + zynqmp_desc.npins; in zynqmp_pctrl_get_groups_count()
114 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynqmp_pctrl_get_group_name() local
116 if (selector < pctrl->ngroups) in zynqmp_pctrl_get_group_name()
117 return pctrl->groups[selector].name; in zynqmp_pctrl_get_group_name()
119 return zynqmp_desc.pins[selector - pctrl->ngroups].name; in zynqmp_pctrl_get_group_name()
127 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynqmp_pctrl_get_group_pins() local
129 if (selector < pctrl->ngroups) { in zynqmp_pctrl_get_group_pins()
[all …]
H A Dpinctrl-zynq.c33 * @pctrl: Pinctrl device
42 struct pinctrl_dev *pctrl; member
827 struct zynq_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynq_pctrl_get_groups_count() local
829 return pctrl->ngroups; in zynq_pctrl_get_groups_count()
835 struct zynq_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynq_pctrl_get_group_name() local
837 return pctrl->groups[selector].name; in zynq_pctrl_get_group_name()
845 struct zynq_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynq_pctrl_get_group_pins() local
847 *pins = pctrl->groups[selector].pins; in zynq_pctrl_get_group_pins()
848 *num_pins = pctrl->groups[selector].npins; in zynq_pctrl_get_group_pins()
864 struct zynq_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in zynq_pmux_get_functions_count() local
[all …]
H A Dpinctrl-bm1880.c921 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in bm1880_pctrl_get_groups_count() local
923 return pctrl->ngroups; in bm1880_pctrl_get_groups_count()
929 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in bm1880_pctrl_get_group_name() local
931 return pctrl->groups[selector].name; in bm1880_pctrl_get_group_name()
939 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in bm1880_pctrl_get_group_pins() local
941 *pins = pctrl->groups[selector].pins; in bm1880_pctrl_get_group_pins()
942 *num_pins = pctrl->groups[selector].npins; in bm1880_pctrl_get_group_pins()
958 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in bm1880_pmux_get_functions_count() local
960 return pctrl->nfuncs; in bm1880_pmux_get_functions_count()
966 struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in bm1880_pmux_get_function_name() local
[all …]
H A Dpinctrl-amd.c870 return amd_pinconf_set(gpio_dev->pctrl, pin, &config, 1); in amd_gpio_set_config()
882 const struct pinctrl_desc *desc = gpio_dev->pctrl->desc; in amd_gpio_irq_init()
891 const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin); in amd_gpio_irq_init()
910 const struct pinctrl_desc *desc = gpio_dev->pctrl->desc; in amd_gpio_check_pending()
947 const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin); in amd_gpio_should_save()
966 const struct pinctrl_desc *desc = gpio_dev->pctrl->desc; in amd_gpio_suspend_hibernate_common()
1021 const struct pinctrl_desc *desc = gpio_dev->pctrl->desc; in amd_gpio_resume()
1110 pd = pin_desc_get(gpio_dev->pctrl, gpio_dev->groups[group].pins[ind]); in amd_set_mux()
1212 gpio_dev->pctrl = devm_pinctrl_register(&pdev->dev, &amd_pinctrl_desc, in amd_gpio_probe()
1214 if (IS_ERR(gpio_dev->pctrl)) { in amd_gpio_probe()
[all …]
H A Dpinctrl-pef2256.c274 struct pinctrl_dev *pctrl; in pef2256_register_pinctrl() local
292 pctrl = devm_pinctrl_register(pef2256->dev, &pef2256->pctrl_desc, pef2256); in pef2256_register_pinctrl()
293 if (IS_ERR(pctrl)) in pef2256_register_pinctrl()
294 return dev_err_probe(pef2256->dev, PTR_ERR(pctrl), in pef2256_register_pinctrl()
/linux/drivers/pinctrl/berlin/
H A Dberlin.c37 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinctrl_get_group_count() local
39 return pctrl->desc->ngroups; in berlin_pinctrl_get_group_count()
45 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinctrl_get_group_name() local
47 return pctrl->desc->groups[group].name; in berlin_pinctrl_get_group_name()
55 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinctrl_dt_node_to_map() local
66 dev_err(pctrl->dev, in berlin_pinctrl_dt_node_to_map()
73 dev_err(pctrl->dev, in berlin_pinctrl_dt_node_to_map()
81 dev_err(pctrl->dev, "can't reserve map: %d\n", ret); in berlin_pinctrl_dt_node_to_map()
90 dev_err(pctrl->dev, "can't add map: %d\n", ret); in berlin_pinctrl_dt_node_to_map()
107 struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in berlin_pinmux_get_functions_count() local
[all …]
/linux/drivers/pinctrl/microchip/
H A Dpinctrl-mpfs-mssio.c55 struct pinctrl_dev *pctrl; member
139 static u32 mpfs_pinctrl_pin_to_bank_voltage(struct mpfs_pinctrl *pctrl, unsigned int pin) in mpfs_pinctrl_pin_to_bank_voltage() argument
144 regmap_read(pctrl->sysreg_regmap, MPFS_PINCTRL_MSSIO_BANK4_CFG_CR, &val); in mpfs_pinctrl_pin_to_bank_voltage()
146 regmap_read(pctrl->sysreg_regmap, MPFS_PINCTRL_MSSIO_BANK2_CFG_CR, &val); in mpfs_pinctrl_pin_to_bank_voltage()
153 static void mpfs_pinctrl_set_bank_voltage(struct mpfs_pinctrl *pctrl, unsigned int pin, in mpfs_pinctrl_set_bank_voltage() argument
159 regmap_assign_bits(pctrl->sysreg_regmap, MPFS_PINCTRL_MSSIO_BANK4_CFG_CR, in mpfs_pinctrl_set_bank_voltage()
162 regmap_assign_bits(pctrl->sysreg_regmap, MPFS_PINCTRL_MSSIO_BANK2_CFG_CR, in mpfs_pinctrl_set_bank_voltage()
276 struct mpfs_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in mpfs_pinctrl_dbg_show() local
289 regmap_read(pctrl->regmap, reg, &func); in mpfs_pinctrl_dbg_show()
303 static int mpfs_pinctrl_set_pin_func(struct mpfs_pinctrl *pctrl, u8 pin, u8 function) in mpfs_pinctrl_set_pin_func() argument
[all …]
H A Dpinctrl-mpfs-iomux0.c25 struct pinctrl_dev *pctrl; member
144 struct mpfs_iomux0_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in mpfs_iomux0_pin_dbg_show() local
149 regmap_read(pctrl->regmap, MPFS_IOMUX0_REG, &val); in mpfs_iomux0_pin_dbg_show()
186 struct mpfs_iomux0_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in mpfs_iomux0_pinmux_set_mux() local
187 struct device *dev = pctrl->dev; in mpfs_iomux0_pinmux_set_mux()
196 regmap_assign_bits(pctrl->regmap, MPFS_IOMUX0_REG, group->mask, group->setting); in mpfs_iomux0_pinmux_set_mux()
232 struct mpfs_iomux0_pinctrl *pctrl; in mpfs_iomux0_probe() local
234 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); in mpfs_iomux0_probe()
235 if (!pctrl) in mpfs_iomux0_probe()
238 pctrl->regmap = device_node_to_regmap(pdev->dev.parent->of_node); in mpfs_iomux0_probe()
[all …]
H A Dpinctrl-pic64gx-gpio2.c29 struct pinctrl_dev *pctrl; member
216 struct pic64gx_gpio2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in pic64gx_gpio2_pin_dbg_show() local
219 regmap_read(pctrl->regmap, PIC64GX_PINMUX_REG, &val); in pic64gx_gpio2_pin_dbg_show()
276 struct pic64gx_gpio2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); in pic64gx_gpio2_pinmux_set_mux() local
277 struct device *dev = pctrl->dev; in pic64gx_gpio2_pinmux_set_mux()
286 regmap_assign_bits(pctrl->regmap, PIC64GX_PINMUX_REG, group->mask, group->setting); in pic64gx_gpio2_pinmux_set_mux()
301 struct pic64gx_gpio2_pinctrl *pctrl; in pic64gx_gpio2_probe() local
304 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); in pic64gx_gpio2_probe()
305 if (!pctrl) in pic64gx_gpio2_probe()
314 pctrl->regmap = devm_regmap_init_mmio(dev, base, &pic64gx_gpio2_regmap_config); in pic64gx_gpio2_probe()
[all …]
/linux/drivers/pinctrl/nuvoton/
H A Dpinctrl-wpcm450.c51 struct wpcm450_pinctrl *pctrl; member
129 struct wpcm450_pinctrl *pctrl = gpio->pctrl; in wpcm450_gpio_irq_ack() local
137 raw_spin_lock_irqsave(&pctrl->lock, flags); in wpcm450_gpio_irq_ack()
138 iowrite32(BIT(bit), pctrl->gpio_base + WPCM450_GPEVST); in wpcm450_gpio_irq_ack()
139 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in wpcm450_gpio_irq_ack()
146 struct wpcm450_pinctrl *pctrl = gpio->pctrl; in wpcm450_gpio_irq_mask() local
155 raw_spin_lock_irqsave(&pctrl->lock, flags); in wpcm450_gpio_irq_mask()
156 even = ioread32(pctrl->gpio_base + WPCM450_GPEVEN); in wpcm450_gpio_irq_mask()
158 iowrite32(even, pctrl->gpio_base + WPCM450_GPEVEN); in wpcm450_gpio_irq_mask()
159 raw_spin_unlock_irqrestore(&pctrl->lock, flags); in wpcm450_gpio_irq_mask()
[all …]
H A Dpinctrl-npcm7xx.c1824 static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) in npcm7xx_gpio_of() argument
1828 struct device *dev = pctrl->dev; in npcm7xx_gpio_of()
1834 pctrl->gpio_bank[id].base = fwnode_iomap(child, 0); in npcm7xx_gpio_of()
1835 if (!pctrl->gpio_bank[id].base) in npcm7xx_gpio_of()
1841 .dat = pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DIN, in npcm7xx_gpio_of()
1842 .set = pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DOUT, in npcm7xx_gpio_of()
1843 .dirin = pctrl->gpio_bank[id].base + NPCM7XX_GP_N_IEM, in npcm7xx_gpio_of()
1847 ret = gpio_generic_chip_init(&pctrl->gpio_bank[id].chip, &config); in npcm7xx_gpio_of()
1864 pctrl->gpio_bank[id].irq = ret; in npcm7xx_gpio_of()
1865 pctrl->gpio_bank[id].irqbase = id * NPCM7XX_GPIO_PER_BANK; in npcm7xx_gpio_of()
[all …]
H A Dpinctrl-npcm8xx.c2317 static int npcm8xx_gpio_fw(struct npcm8xx_pinctrl *pctrl) in npcm8xx_gpio_fw() argument
2321 struct device *dev = pctrl->dev; in npcm8xx_gpio_fw()
2327 pctrl->gpio_bank[id].base = fwnode_iomap(child, 0); in npcm8xx_gpio_fw()
2328 if (!pctrl->gpio_bank[id].base) in npcm8xx_gpio_fw()
2334 .dat = pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DIN, in npcm8xx_gpio_fw()
2335 .set = pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DOUT, in npcm8xx_gpio_fw()
2336 .dirin = pctrl->gpio_bank[id].base + NPCM8XX_GP_N_IEM, in npcm8xx_gpio_fw()
2340 ret = gpio_generic_chip_init(&pctrl->gpio_bank[id].chip, &config); in npcm8xx_gpio_fw()
2353 pctrl->gpio_bank[id].irq = ret; in npcm8xx_gpio_fw()
2354 pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; in npcm8xx_gpio_fw()
[all …]
/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dpctrl.yaml4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/pctrl.yaml#
17 - const: hisilicon,pctrl
30 pctrl@fca09000 {
31 compatible = "hisilicon,pctrl";
/linux/drivers/phy/hisilicon/
H A Dphy-hi3660-usb3.c61 struct regmap *pctrl; member
79 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); in hi3660_phy_init()
155 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); in hi3660_phy_exit()
190 priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node, in hi3660_phy_probe()
191 "hisilicon,pctrl-syscon"); in hi3660_phy_probe()
192 if (IS_ERR(priv->pctrl)) { in hi3660_phy_probe()
193 dev_err(dev, "no hisilicon,pctrl-syscon\n"); in hi3660_phy_probe()
194 return PTR_ERR(priv->pctrl); in hi3660_phy_probe()
H A Dphy-hi3670-usb3.c129 struct regmap *pctrl; member
356 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, in hi3670_config_phy_clock()
362 ret = regmap_update_bits(priv->pctrl, in hi3670_config_phy_clock()
567 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, in hi3670_phy_exit()
607 priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node, in hi3670_phy_probe()
608 "hisilicon,pctrl-syscon"); in hi3670_phy_probe()
609 if (IS_ERR(priv->pctrl)) { in hi3670_phy_probe()
610 dev_err(dev, "no hisilicon,pctrl-syscon\n"); in hi3670_phy_probe()
611 return PTR_ERR(priv->pctrl); in hi3670_phy_probe()
/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,hi3660-usb3.yaml25 hisilicon,pctrl-syscon:
37 - hisilicon,pctrl-syscon
49 hisilicon,pctrl-syscon = <&pctrl>;
H A Dhisilicon,hi3670-usb3.yaml26 hisilicon,pctrl-syscon:
46 - hisilicon,pctrl-syscon
60 hisilicon,pctrl-syscon = <&pctrl>;
/linux/Documentation/devicetree/bindings/soc/hisilicon/
H A Dhisilicon,hi3660-usb3-otg-bc.yaml43 hisilicon,pctrl-syscon = <&pctrl>;
/linux/drivers/net/dsa/mxl862xx/
H A Dmxl862xx-host.c128 static void mxl862xx_crc6_encode(u16 *pctrl, u16 *plen_ret) in mxl862xx_crc6_encode() argument
133 *pctrl |= BIT(13); in mxl862xx_crc6_encode()
135 crc = mxl862xx_crc6(*pctrl, *plen_ret); in mxl862xx_crc6_encode()
138 ctrl = (*pctrl & ~GENMASK(14, 13)); in mxl862xx_crc6_encode()
147 len_ret |= (*pctrl & BIT(14)) | ((*pctrl & BIT(13)) << 2); in mxl862xx_crc6_encode()
149 *pctrl = ctrl; in mxl862xx_crc6_encode()

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