Lines Matching full:pctrl
2321 static int npcm8xx_gpio_fw(struct npcm8xx_pinctrl *pctrl) in npcm8xx_gpio_fw() argument
2324 struct device *dev = pctrl->dev; in npcm8xx_gpio_fw()
2330 pctrl->gpio_bank[id].base = fwnode_iomap(child, 0); in npcm8xx_gpio_fw()
2331 if (!pctrl->gpio_bank[id].base) in npcm8xx_gpio_fw()
2334 ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4, in npcm8xx_gpio_fw()
2335 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DIN, in npcm8xx_gpio_fw()
2336 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_DOUT, in npcm8xx_gpio_fw()
2339 pctrl->gpio_bank[id].base + NPCM8XX_GP_N_IEM, in npcm8xx_gpio_fw()
2352 pctrl->gpio_bank[id].irq = ret; in npcm8xx_gpio_fw()
2353 pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; in npcm8xx_gpio_fw()
2354 pctrl->gpio_bank[id].irqbase = id * NPCM8XX_GPIO_PER_BANK; in npcm8xx_gpio_fw()
2355 pctrl->gpio_bank[id].pinctrl_id = args.args[0]; in npcm8xx_gpio_fw()
2356 pctrl->gpio_bank[id].gc.base = -1; in npcm8xx_gpio_fw()
2357 pctrl->gpio_bank[id].gc.ngpio = args.args[2]; in npcm8xx_gpio_fw()
2358 pctrl->gpio_bank[id].gc.owner = THIS_MODULE; in npcm8xx_gpio_fw()
2359 pctrl->gpio_bank[id].gc.parent = dev; in npcm8xx_gpio_fw()
2360 pctrl->gpio_bank[id].gc.fwnode = child; in npcm8xx_gpio_fw()
2361 pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child); in npcm8xx_gpio_fw()
2362 if (pctrl->gpio_bank[id].gc.label == NULL) in npcm8xx_gpio_fw()
2365 pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show; in npcm8xx_gpio_fw()
2366 pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input; in npcm8xx_gpio_fw()
2367 pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input; in npcm8xx_gpio_fw()
2368 pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output; in npcm8xx_gpio_fw()
2369 pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output; in npcm8xx_gpio_fw()
2370 pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request; in npcm8xx_gpio_fw()
2371 pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request; in npcm8xx_gpio_fw()
2372 pctrl->gpio_bank[id].gc.free = pinctrl_gpio_free; in npcm8xx_gpio_fw()
2374 pctrl->gpio_bank[id].debounce.set_val[i] = false; in npcm8xx_gpio_fw()
2375 pctrl->gpio_bank[id].gc.add_pin_ranges = npcmgpio_add_pin_ranges; in npcm8xx_gpio_fw()
2379 pctrl->bank_num = id; in npcm8xx_gpio_fw()
2383 static int npcm8xx_gpio_register(struct npcm8xx_pinctrl *pctrl) in npcm8xx_gpio_register() argument
2387 for (id = 0 ; id < pctrl->bank_num ; id++) { in npcm8xx_gpio_register()
2390 girq = &pctrl->gpio_bank[id].gc.irq; in npcm8xx_gpio_register()
2391 girq->chip = &pctrl->gpio_bank[id].irq_chip; in npcm8xx_gpio_register()
2394 girq->parents = devm_kcalloc(pctrl->dev, girq->num_parents, in npcm8xx_gpio_register()
2400 girq->parents[0] = pctrl->gpio_bank[id].irq; in npcm8xx_gpio_register()
2403 ret = devm_gpiochip_add_data(pctrl->dev, in npcm8xx_gpio_register()
2404 &pctrl->gpio_bank[id].gc, in npcm8xx_gpio_register()
2405 &pctrl->gpio_bank[id]); in npcm8xx_gpio_register()
2407 return dev_err_probe(pctrl->dev, ret, "Failed to add GPIO chip %u\n", id); in npcm8xx_gpio_register()
2416 struct npcm8xx_pinctrl *pctrl; in npcm8xx_pinctrl_probe() local
2419 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); in npcm8xx_pinctrl_probe()
2420 if (!pctrl) in npcm8xx_pinctrl_probe()
2423 pctrl->dev = dev; in npcm8xx_pinctrl_probe()
2424 platform_set_drvdata(pdev, pctrl); in npcm8xx_pinctrl_probe()
2426 pctrl->gcr_regmap = in npcm8xx_pinctrl_probe()
2428 if (IS_ERR(pctrl->gcr_regmap)) in npcm8xx_pinctrl_probe()
2429 return dev_err_probe(dev, PTR_ERR(pctrl->gcr_regmap), in npcm8xx_pinctrl_probe()
2432 ret = npcm8xx_gpio_fw(pctrl); in npcm8xx_pinctrl_probe()
2437 pctrl->pctldev = devm_pinctrl_register(dev, &npcm8xx_pinctrl_desc, pctrl); in npcm8xx_pinctrl_probe()
2438 if (IS_ERR(pctrl->pctldev)) in npcm8xx_pinctrl_probe()
2439 return dev_err_probe(dev, PTR_ERR(pctrl->pctldev), in npcm8xx_pinctrl_probe()
2442 ret = npcm8xx_gpio_register(pctrl); in npcm8xx_pinctrl_probe()