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Searched +full:pcie +full:- +full:sa8775p (Results 1 – 13 of 13) sorted by relevance

/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sa8775p.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SA8775p PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SA8775p SoC PCIe root complex controller is based on the Synopsys
15 DesignWare PCIe IP.
19 const: qcom,pcie-sa8775p
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H A Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PCIe Endpoint Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sa8775p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on sa8775p
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
14 power domains on sa8775p.
16 See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h
20 const: qcom,sa8775p-gcc
24 - description: XO reference clock
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/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (PCIe, SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19 - qcom,sa8775p-qmp-gen4x2-pcie-phy
20 - qcom,sa8775p-qmp-gen4x4-pcie-phy
21 - qcom,sc8180x-qmp-pcie-phy
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H A Dqcom,sc8280xp-qmp-usb3-uni-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,ipq9574-qmp-usb3-phy
22 - qcom,msm8996-qmp-usb3-phy
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sa8775p-rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
16 See also:: include/dt-bindings/interconnect/qcom,sa8775p.h
21 - qcom,sa8775p-aggre1-noc
22 - qcom,sa8775p-aggre2-noc
23 - qcom,sa8775p-clk-virt
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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
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/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
48 USB, UFS, SD/eMMC, PCIe, etc.
161 i2c, USB, SD/eMMC, SATA, PCIe, etc.
316 i2c, USB, SD/eMMC, SATA, PCIe, etc.
367 i2c, USB, SD/eMMC, SATA, PCIe, etc.
385 i2c, USB, SD/eMMC, SATA, PCIe, etc.
401 i2c, USB, UFS, SD/eMMC, PCIe, etc.
409 i2c, USB, UFS, SD/eMMC, PCIe, etc.
426 i2c, USB, UFS, SD/eMMC, PCIe, etc.
468 devices such as UART, SPI, I2C, USB, SD/eMMC, PCIe etc.
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/linux/drivers/interconnect/qcom/
H A Dsa8775p.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
9 #include <linux/interconnect-provider.h>
13 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include "bcm-voter.h"
16 #include "icc-rpmh.h"
2502 { .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc, },
2503 { .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc, },
2504 { .compatible = "qcom,sa8775p-clk-virt", .data = &sa8775p_clk_virt, },
2505 { .compatible = "qcom,sa8775p-config-noc", .data = &sa8775p_config_noc, },
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/linux/drivers/pci/controller/dwc/
H A Dpcie-qcom-ep.c1 // SPDX-License-Identifier: GPL-2.0
3 * Qualcomm PCIe Endpoint controller driver
18 #include <linux/phy/pcie.h>
27 #include "pcie-designware.h"
28 #include "pcie-qcom-common.h"
153 #define to_pcie_ep(x) dev_get_drvdata((x)->dev)
163 * struct qcom_pcie_ep_cfg - Per SoC config struct
175 * struct qcom_pcie_ep - Qualcomm PCIe Endpoint Controller
176 * @pci: Designware PCIe controller struct
177 * @parf: Qualcomm PCIe specific PARF register base
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H A Dpcie-qcom.c1 // SPDX-License-Identifier: GPL-2.0
3 * Qualcomm PCIe root complex driver
5 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
8 * Author: Stanimir Varbanov <svarbanov@mm-sol.com>
28 #include <linux/phy/pcie.h>
37 #include "pcie-designware.h"
38 #include "pcie-qcom-common.h"
243 int (*get_resources)(struct qcom_pcie *pcie);
244 int (*init)(struct qcom_pcie *pcie);
245 int (*post_init)(struct qcom_pcie *pcie);
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
17 #include <linux/phy/pcie.h>
25 #include <dt-bindings/phy/phy-qcom-qmp.h>
27 #include "phy-qcom-qmp-common.h"
29 #include "phy-qcom-qmp.h"
30 #include "phy-qcom-qmp-pcs-misc-v3.h"
31 #include "phy-qcom-qmp-pcs-pcie-v4.h"
32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"
33 #include "phy-qcom-qmp-pcs-pcie-v5.h"
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/linux/drivers/pci/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
20 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
37 * Retrain the link of a downstream PCIe port by hand if necessary.
42 * 2 x PCIe x1 device, P/N 41433, plugged into the SiFive HiFive Unmatched
91 int ret = -ENOTTY; in pcie_failed_link_retrain()
94 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
103 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
170 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
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