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/freebsd/sys/contrib/device-tree/Bindings/net/nfc/
H A Dmarvell,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/marvel
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H A Dnfcmrvl.txt1 * Marvell International Ltd. NCI NFC Controller
4 - compatible: Should be:
5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
6 - "marvell,nfc-i2c" for I2C devices
7 - "marvell,nfc-spi" for SPI devices
10 - pinctrl-names: Contains only one value - "default".
11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
15 Optional UART-based chip specific properties:
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H A Dpn532.txt1 * NXP Semiconductors PN532 NFC Controller
4 - compatible: Should be
5 - "nxp,pn532" Place a node with this inside the devicetree node of the bus
6 where the NFC chip is connected to.
7 Currently the kernel has phy bindings for uart and i2c.
8 - "nxp,pn532-i2c" (DEPRECATED) only works for the i2c binding.
9 - "nxp,pn533-i2c" (DEPRECATED) only works for the i2c binding.
11 Required properties if connected on i2c:
12 - clock-frequency: I²C work frequency.
13 - reg: for the I²C bus address. This is fixed at 0x24 for the PN532.
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H A Dnxp,pn532.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/nxp,pn532.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Semiconductors PN532 NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - const: nxp,pn532
16 - description: Deprecated bindings
18 - nxp,pn532-i2c
19 - nxp,pn533-i2c
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H A Dst,st-nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/st,st-nci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics ST NCI NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - st,st21nfcb-i2c
16 - st,st21nfcb-spi
17 - st,st21nfcc-i2c
19 reset-gpios:
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H A Dnxp,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/nxp,nci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Semiconductors NCI NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - const: nxp,nxp-nci-i2c
16 - items:
17 - enum:
18 - nxp,nq310
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H A Dst-nci-i2c.txt1 * STMicroelectronics SAS. ST NCI NFC Controller
4 - compatible: Should be "st,st21nfcb-i2c" or "st,st21nfcc-i2c".
5 - clock-frequency: I²C work frequency.
6 - reg: address on the bus
7 - interrupts: GPIO interrupt to which the chip is connected
8 - reset-gpios: Output GPIO pin used to reset the ST21NFCB
11 - pinctrl-names: Contains only one value - "default".
12 - pintctrl-0: Specifies the pin control groups used for this controller.
13 - ese-present: Specifies that an ese is physically connected to the nfc
15 - uicc-present: Specifies that the uicc swp signal can be physically
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H A Dsamsung,s3fwrn5.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/samsung,s3fwrn5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3FWRN5 NCI NFC Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,s3fwrn5-i2c
16 - samsung,s3fwrn82
18 en-gpios:
32 wake-gpios:
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H A Dnxp,pn544.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/nxp,pn544.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Semiconductors PN544 NFC Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: nxp,pn544-i2c
22 enable-gpios:
26 firmware-gpios:
31 - compatible
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H A Dst,st21nfca.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/st,st21nfca.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics SAS ST21NFCA NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: st,st21nfca-i2c
16 enable-gpios:
19 ese-present:
30 uicc-present:
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H A Dst21nfca.txt1 * STMicroelectronics SAS. ST21NFCA NFC Controller
4 - compatible: Should be "st,st21nfca-i2c".
5 - clock-frequency: I²C work frequency.
6 - reg: address on the bus
7 - enable-gpios: Output GPIO pin used for enabling/disabling the ST21NFCA
10 - pinctrl-names: Contains only one value - "default".
11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - ese-present: Specifies that an ese is physically connected to the nfc
14 - uicc-present: Specifies that the uicc swp signal can be physically
15 connected to the nfc controller.
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H A Dnxp-nci.txt1 * NXP Semiconductors NXP NCI NFC Controllers
4 - compatible: Should be "nxp,nxp-nci-i2c".
5 - clock-frequency: I²C work frequency.
6 - reg: address on the bus
7 - interrupts: GPIO interrupt to which the chip is connected
8 - enable-gpios: Output GPIO pin used for enabling/disabling the chip
11 - pinctrl-names: Contains only one value - "default".
12 - pintctrl-0: Specifies the pin control groups used for this controller.
13 - firmware-gpios: Output GPIO pin used to enter firmware download mode
15 Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2):
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H A Ds3fwrn5.txt1 * Samsung S3FWRN5 NCI NFC Controller
4 - compatible: Should be "samsung,s3fwrn5-i2c".
5 - reg: address on the bus
6 - interrupts: GPIO interrupt to which the chip is connected
7 - s3fwrn5,en-gpios: Output GPIO pin used for enabling/disabling the chip
8 - s3fwrn5,fw-gpios: Output GPIO pin used to enter firmware mode and
15 compatible = "samsung,s3fwrn5-i2c";
19 interrupt-parent = <&gpa1>;
22 s3fwrn5,en-gpios = <&gpf1 4 0>;
23 s3fwrn5,fw-gpios = <&gpj0 2 0>;
H A Dpn544.txt1 * NXP Semiconductors PN544 NFC Controller
4 - compatible: Should be "nxp,pn544-i2c".
5 - clock-frequency: I²C work frequency.
6 - reg: address on the bus
7 - interrupts: GPIO interrupt to which the chip is connected
8 - enable-gpios: Output GPIO pin used for enabling/disabling the PN544
9 - firmware-gpios: Output GPIO pin used to enter firmware download mode
12 - pinctrl-names: Contains only one value - "default".
13 - pintctrl-0: Specifies the pin control groups used for this controller.
15 Example (for ARM-based BeagleBone with PN544 on I2C2):
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8916-samsung-serranove.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "msm8916-pm8916.dtsi"
9 #include "msm8916-modem-qdsp6.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-binding
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H A Dmsm8916-samsung-a2015-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "msm8916-pm8916.dtsi"
4 #include "msm8916-modem-qdsp6.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/sound/apq8016-lpass.h>
20 stdout-path = "serial0";
23 reserved-memory {
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H A Dmsm8916-samsung-fortuna-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "msm8916-pm8916.dtsi"
4 #include "msm8916-modem-qdsp6.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 stdout-path = "serial0";
22 reserved-memory {
24 tz-apps@85a00000 {
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H A Dmsm8939-samsung-a7.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8939-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/sound/apq8016-lpass.h>
16 chassis-type = "handset";
25 stdout-path = "serial0";
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H A Dmsm8916-samsung-gprimeltecan.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-fortuna-common.dtsi"
8 model = "Samsung Galaxy Grand Prime (SM-G530W)";
10 chassis-type = "handset";
12 reserved-memory {
14 /delete-node/ tz-apps@85a00000;
17 tz-apps@85500000 {
19 no-map;
25 charge-term-current-microamp = <200000>;
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H A Dmsm8916-samsung-grandmax.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-e2015-common.dtsi"
6 #include <dt-bindings/leds/common.h>
12 * There seems to be no way to boot ARM64 kernels on 32-bit devices at the
18 * arch/arm/boot/dts/qcom-msm8916-samsung-grandmax.dts
24 chassis-type = "handset";
26 /delete-node/ gpio-hall-sensor;
27 /delete-node/ i2c-nfc;
28 /delete-node/ i2c-tkey;
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-ux500-samsung-codina.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Ace 2 GT-I8160 also known as Codina.
11 * The Samsung tree further talks about GT-I8160P and GT-I8160chn (China).
12 * The GT-I8160 plain is known as the "europe" variant.
13 * The GT-I8160P is the CDMA version and it appears to not use the ST
14 * Microelectronics accelerometer and reportedly has NFC mounte
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H A Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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H A Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
37 compatible = "fixed-clock";
38 clock-frequency = <24000000>;
39 #clock-cells = <0>;
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H A Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3128-power.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
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