| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | display-timings.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
12 - Sam Ravnborg <sam@ravnborg.org>
17 The display-timings node makes it possible to specify the timings
18 and to specify the timing that is native for the display.
22 const: display-timings
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| /linux/Documentation/devicetree/bindings/ |
| H A D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
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| /linux/drivers/gpu/drm/i915/gt/uc/abi/ |
| H A D | guc_klvs_abi.h | 1 /* SPDX-License-Identifier: MIT */
14 * +---+-------+--------------------------------------------------------------+
17 * | 0 | 31:16 | **KEY** - KLV key identifier |
18 * | | | - `GuC Self Config KLVs`_ |
20 * | +-------+--------------------------------------------------------------+
21 * | | 15:0 | **LEN** - length of VALUE (in 32bit dwords) |
22 * +---+-------+--------------------------------------------------------------+
23 * | 1 | 31:0 | **VALUE** - actual value of the KLV (format depends on KEY) |
24 * +---+-------+ |
26 * +---+-------+ |
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| /linux/include/drm/display/ |
| H A D | drm_dsc.h | 1 /* SPDX-License-Identifier: MIT
45 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
67 * struct drm_dsc_config - Parameters required to configure DSC
84 * Flag to indicate if RGB - YCoCg conversion is needed
101 * @simple_422: True if simple 4_2_2 mode is enabled else False
173 u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
221 * @vbr_enable: True if VBR mode is enabled, false if disabled
225 * @mux_word_size: Mux word size (in bits) for SSM mode
247 * @native_422: True if Native 4:2:2 supported, else false
251 * @native_420: True if Native 4:2:0 supported else false.
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| /linux/drivers/ps3/ |
| H A D | ps3av.c | 1 // SPDX-License-Identifier: GPL-2.0-only
156 if (hdr->cid & PS3AV_EVENT_CMD_MASK) { in ps3av_parse_event_packet()
157 table = ps3av_search_cmd_table(hdr->cid, PS3AV_EVENT_CMD_MASK); in ps3av_parse_event_packet()
159 dev_dbg(&ps3av->dev->core, in ps3av_parse_event_packet()
161 hdr->cid, ps3av_event_get_port_id(hdr->cid), in ps3av_parse_event_packet()
162 hdr->size); in ps3av_parse_event_packet()
166 __func__, hdr->cid, hdr->size); in ps3av_parse_event_packet()
179 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); in ps3av_vuart_write()
181 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__); in ps3av_vuart_write()
191 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); in ps3av_vuart_read()
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| /linux/tools/testing/selftests/powerpc/tm/ |
| H A D | tm-trap.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 * to zero which determines a BE endianness that is the native
27 * endianness "flipped back" to the native endianness (BE).
67 thread_endianness = MSR_LE & ucp->uc_mcontext.gp_regs[PT_MSR]; in trap_signal_handler()
70 * Little-Endian Machine in trap_signal_handler()
94 * not in transacional mode). On te other hand, if after in trap_signal_handler()
95 * the return from the signal handler the endianness in- in trap_signal_handler()
98 * and (4) are executed (tbegin.; trap;) and we get sim- in trap_signal_handler()
99 * ilaly on the trap signal handler, but now in TM mode. in trap_signal_handler()
104 * Finally, getting a trap in TM mode or not is just in trap_signal_handler()
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| /linux/tools/testing/selftests/drivers/net/ |
| H A D | ping.py | 2 # SPDX-License-Identifier: GPL-2.0
14 def _test_v4(cfg) -> None:
18 cmd("ping -c 1 -W0.5 " + cfg.remote_addr_v["4"])
19 cmd("ping -c 1 -W0.5 " + cfg.addr_v["4"], host=cfg.remote)
20 cmd("ping -s 65000 -c 1 -W0.5 " + cfg.remote_addr_v["4"])
21 cmd("ping -s 65000 -c 1 -W0.5 " + cfg.addr_v["4"], host=cfg.remote)
23 def _test_v6(cfg) -> None:
27 cmd("ping -c 1 -W5 " + cfg.remote_addr_v["6"])
28 cmd("ping -c 1 -W5 " + cfg.addr_v["6"], host=cfg.remote)
29 cmd("ping -s 65000 -c 1 -W0.5 " + cfg.remote_addr_v["6"])
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-hid-logitech-lg4ff | 4 Contact: Michal Malý <madcatxster@devoid-pointer.net>
12 Contact: Michal Malý <madcatxster@devoid-pointer.net>
14 mode is listed as follows:
16 Tag: Mode Name
18 Currently active mode is marked with an asterisk. List also
19 contains an abstract item "native" which always denotes the
20 native mode of the wheel. Echoing the mode tag switches the
21 wheel into the corresponding mode. Depending on the exact model
23 If a wheel cannot be switched into the desired mode, -EINVAL
26 This entry is not created for devices that have only one mode.
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | renesas,sh-msiof.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - const: renesas,msiof-sh73a0 # SH-Mobile AG5
17 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible
19 - items:
20 - enum:
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
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| /linux/Documentation/devicetree/bindings/regmap/ |
| H A D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
|
| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
26 space, Port Logic Registers (PL), Shadow Config-space Registers,
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| H A D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
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| /linux/Documentation/devicetree/bindings/display/tilcdc/ |
| H A D | panel.txt | 1 Device-Tree bindings for tilcdc DRM generic panel output driver
4 - compatible: value should be "ti,tilcdc,panel".
5 - panel-info: configuration info to configure LCDC correctly for the panel
6 - ac-bias: AC Bias Pin Frequency
7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
8 - dma-burst-sz: DMA burst size
9 - bpp: Bits per pixel
10 - fdd: FIFO DMA Request Delay
11 - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
12 - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
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| /linux/arch/powerpc/platforms/chrp/ |
| H A D | pci.c | 1 // SPDX-License-Identifier: GPL-2.0
19 #include <asm/pci-bridge.h>
40 if (bus->number > 7) in gg2_read_config()
46 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); in gg2_read_config()
67 if (bus->number > 7) in gg2_write_config()
73 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); in gg2_write_config()
102 | (((bus->number - hose->first_busno) & 0xff) << 16) in rtas_read_config()
103 | (hose->global_number << 24); in rtas_read_config()
104 int ret = -1; in rtas_read_config()
117 | (((bus->number - hose->first_busno) & 0xff) << 16) in rtas_write_config()
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| /linux/arch/arm/include/asm/ |
| H A D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 * instructions (which are not available from user mode) to ensure
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
137 * This means that reading a 32-bit word at address 0 returns the same
138 * value irrespective of the endian mode bit.
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| /linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | cpm.txt | 4 - compatible : compatible list, currently only "ibm,cpm"
5 - dcr-access-method : "native"
6 - dcr-reg : < DCR register range >
9 - er-offset : All 4xx SoCs with a CPM controller have
15 er-offset = <1>.
16 - unused-units : specifier consist of one cell. For each
20 - idle-doze : specifier consist of one cell. For each
24 - standby : specifier consist of one cell. For each
28 - suspend : specifier consist of one cell. For each
39 refresh mode and any additional power
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| /linux/arch/mips/boot/dts/brcm/ |
| H A D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| H A D | bcm7358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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| /linux/drivers/hid/ |
| H A D | hid-lg4ff.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include "hid-lg.h"
21 #include "hid-lg4ff.h"
22 #include "hid-ids.h"
45 #define LG4FF_DFEX_TAG "DF-EX"
91 -1
95 -1
164 [LG4FF_MODE_NATIVE_IDX] = {0, "native", ""},
226 /* Compatibility mode switching commands */
227 /* EXT_CMD9 - Understood by G27 and DFGT */
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| /linux/net/dsa/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
22 tristate "No-op tag driver"
28 tristate "Tag driver for Atheros AR9331 SoC with built-in switch"
31 the Atheros AR9331 SoC with built-in switch.
38 tristate "Tag driver for Broadcom switches using in-frame headers"
45 tristate "Tag driver for BCM63xx legacy switches using in-frame headers"
55 tristate "Tag driver for BCM53xx legacy switches using in-frame headers"
118 (VSC7511, VSC7512, VSC7513, VSC7514, VSC9953, VSC9959). In this mode,
120 hardware-defined injection/extraction frame header. Flow control
122 this mode.
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| /linux/drivers/rtc/ |
| H A D | rtc-rx6110.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Epson RTC module RX-6110 SA
19 /* RX-6110 Register definitions */
103 * rx6110_rtc_tm_to_data - convert rtc_time to native time encoding
106 * @data: holds the encoding in rx6110 native form
117 if (tm->tm_year < 100 || tm->tm_year >= 200) in rx6110_rtc_tm_to_data()
118 return -EINVAL; in rx6110_rtc_tm_to_data()
120 data[RTC_SEC] = bin2bcd(tm->tm_sec); in rx6110_rtc_tm_to_data()
121 data[RTC_MIN] = bin2bcd(tm->tm_min); in rx6110_rtc_tm_to_data()
122 data[RTC_HOUR] = bin2bcd(tm->tm_hour); in rx6110_rtc_tm_to_data()
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| /linux/drivers/spi/ |
| H A D | spi-dw-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
69 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
70 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
71 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
72 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()
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| /linux/Documentation/fb/ |
| H A D | sisfb.rst | 2 sisfb - SiS framebuffer device driver
8 - SiS 300 series: SiS 300/305, 540, 630(S), 730(S)
9 - SiS 315 series: SiS 315/H/PRO, 55x, (M)65x, 740, (M)661(F/M)X, (M)741(GX)
10 - SiS 330 series: SiS 330 ("Xabre"), (M)760
16 sisfb is eg. useful if you want a high-resolution text console. Besides that,
46 append="video=sisfb:mode:1024x768x16,mem:12288,rate:75"
50 modprobe sisfb mode=1024x768x16 rate=75 mem=12288
54 the parameter format is video=sisfb:mode:none or video=sisfb:mode:1024x768x16
55 (or whatever mode you want to use, alternatively using any other format
56 described above or the vesa keyword instead of mode). If compiled as a module,
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| /linux/arch/powerpc/include/asm/ |
| H A D | syscalls.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
29 * High and low parts are swapped depending on endian mode,
39 * PowerPC architecture-specific syscalls
112 long sys_ppc_fallocate(int fd, int mode, u32 offset1, u32 offset2,
148 #define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native) argument
|