| /linux/drivers/mtd/nand/raw/ |
| H A D | meson_nand.c | 172 struct clk *nand_clk; member
279 ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate); in meson_nfc_select_chip()
1166 nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw); in meson_nfc_clk_init()
1167 if (IS_ERR(nfc->nand_clk)) in meson_nfc_clk_init()
1168 return PTR_ERR(nfc->nand_clk); in meson_nfc_clk_init()
1186 ret = clk_prepare_enable(nfc->nand_clk); in meson_nfc_clk_init()
1192 ret = clk_set_rate(nfc->nand_clk, 24000000); in meson_nfc_clk_init()
1199 clk_disable_unprepare(nfc->nand_clk); in meson_nfc_clk_init()
1209 clk_disable_unprepare(nfc->nand_clk); in meson_nfc_disable_clk()
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| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | denali,nand.yaml | 144 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
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| /linux/drivers/clk/actions/ |
| H A D | owl-s500.c | 397 static OWL_COMP_DIV(nand_clk, "nand_clk", nand_clk_mux_p,
460 &nand_clk.common,
521 [CLK_NAND] = &nand_clk.common.hw,
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| /linux/drivers/clk/sunxi-ng/ |
| H A D | ccu-sun5i.c | 327 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
566 &nand_clk.common,
693 [CLK_NAND] = &nand_clk.common.hw,
827 [CLK_NAND] = &nand_clk.common.hw,
937 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun8i-a23.c | 293 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
506 &nand_clk.common,
628 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun8i-h3.c | 334 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
574 &nand_clk.common,
714 [CLK_NAND] = &nand_clk.common.hw,
836 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun8i-a33.c | 307 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
540 &nand_clk.common,
669 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun8i-a83t.c | 393 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents,
649 &nand_clk.common,
754 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun50i-a64.c | 416 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
702 &nand_clk.common,
818 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun4i-a10.c | 451 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
953 &nand_clk.common,
1148 [CLK_NAND] = &nand_clk.common.hw,
1306 [CLK_NAND] = &nand_clk.common.hw,
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| H A D | ccu-sun8i-r40.c | 491 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
898 &nand_clk.common,
1101 [CLK_NAND] = &nand_clk.common.hw,
|
| /linux/drivers/clk/socfpga/ |
| H A D | clk-gate.c | 19 #define SOCFPGA_NAND_CLK "nand_clk"
|
| H A D | clk-s10.c | 300 { STRATIX10_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0xA4,
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| H A D | clk-agilex.c | 331 { AGILEX_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0x7C,
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| /linux/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_arria10.dtsi | 391 nand_clk: nand_clk { label
680 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
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| H A D | socfpga.dtsi | 480 nand_clk: nand_clk { label
779 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
|